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[llvm/msp430.git] / utils / TableGen / CodeGenTarget.cpp
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1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/Streams.h"
23 #include <algorithm>
24 using namespace llvm;
25
26 static cl::opt<unsigned>
27 AsmWriterNum("asmwriternum", cl::init(0),
28 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
29
30 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
31 /// record corresponds to.
32 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
33 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
34 }
35
36 std::string llvm::getName(MVT::SimpleValueType T) {
37 switch (T) {
38 case MVT::Other: return "UNKNOWN";
39 case MVT::i1: return "MVT::i1";
40 case MVT::i8: return "MVT::i8";
41 case MVT::i16: return "MVT::i16";
42 case MVT::i32: return "MVT::i32";
43 case MVT::i64: return "MVT::i64";
44 case MVT::i128: return "MVT::i128";
45 case MVT::iAny: return "MVT::iAny";
46 case MVT::fAny: return "MVT::fAny";
47 case MVT::f32: return "MVT::f32";
48 case MVT::f64: return "MVT::f64";
49 case MVT::f80: return "MVT::f80";
50 case MVT::f128: return "MVT::f128";
51 case MVT::ppcf128: return "MVT::ppcf128";
52 case MVT::Flag: return "MVT::Flag";
53 case MVT::isVoid:return "MVT::isVoid";
54 case MVT::v2i8: return "MVT::v2i8";
55 case MVT::v4i8: return "MVT::v4i8";
56 case MVT::v2i16: return "MVT::v2i16";
57 case MVT::v8i8: return "MVT::v8i8";
58 case MVT::v4i16: return "MVT::v4i16";
59 case MVT::v2i32: return "MVT::v2i32";
60 case MVT::v1i64: return "MVT::v1i64";
61 case MVT::v16i8: return "MVT::v16i8";
62 case MVT::v8i16: return "MVT::v8i16";
63 case MVT::v4i32: return "MVT::v4i32";
64 case MVT::v2i64: return "MVT::v2i64";
65 case MVT::v2f32: return "MVT::v2f32";
66 case MVT::v4f32: return "MVT::v4f32";
67 case MVT::v2f64: return "MVT::v2f64";
68 case MVT::v3i32: return "MVT::v3i32";
69 case MVT::v3f32: return "MVT::v3f32";
70 case MVT::iPTR: return "TLI.getPointerTy()";
71 case MVT::iPTRAny: return "TLI.getPointerTy()";
72 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
73 }
74 }
75
76 std::string llvm::getEnumName(MVT::SimpleValueType T) {
77 switch (T) {
78 case MVT::Other: return "MVT::Other";
79 case MVT::i1: return "MVT::i1";
80 case MVT::i8: return "MVT::i8";
81 case MVT::i16: return "MVT::i16";
82 case MVT::i32: return "MVT::i32";
83 case MVT::i64: return "MVT::i64";
84 case MVT::i128: return "MVT::i128";
85 case MVT::iAny: return "MVT::iAny";
86 case MVT::fAny: return "MVT::fAny";
87 case MVT::f32: return "MVT::f32";
88 case MVT::f64: return "MVT::f64";
89 case MVT::f80: return "MVT::f80";
90 case MVT::f128: return "MVT::f128";
91 case MVT::ppcf128: return "MVT::ppcf128";
92 case MVT::Flag: return "MVT::Flag";
93 case MVT::isVoid:return "MVT::isVoid";
94 case MVT::v2i8: return "MVT::v2i8";
95 case MVT::v4i8: return "MVT::v4i8";
96 case MVT::v2i16: return "MVT::v2i16";
97 case MVT::v8i8: return "MVT::v8i8";
98 case MVT::v4i16: return "MVT::v4i16";
99 case MVT::v2i32: return "MVT::v2i32";
100 case MVT::v1i64: return "MVT::v1i64";
101 case MVT::v16i8: return "MVT::v16i8";
102 case MVT::v8i16: return "MVT::v8i16";
103 case MVT::v4i32: return "MVT::v4i32";
104 case MVT::v2i64: return "MVT::v2i64";
105 case MVT::v2f32: return "MVT::v2f32";
106 case MVT::v4f32: return "MVT::v4f32";
107 case MVT::v2f64: return "MVT::v2f64";
108 case MVT::v3i32: return "MVT::v3i32";
109 case MVT::v3f32: return "MVT::v3f32";
110 case MVT::iPTR: return "MVT::iPTR";
111 case MVT::iPTRAny: return "MVT::iPTRAny";
112 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
113 }
114 }
115
116 /// getQualifiedName - Return the name of the specified record, with a
117 /// namespace qualifier if the record contains one.
118 ///
119 std::string llvm::getQualifiedName(const Record *R) {
120 std::string Namespace = R->getValueAsString("Namespace");
121 if (Namespace.empty()) return R->getName();
122 return Namespace + "::" + R->getName();
123 }
124
125
126
127
128 /// getTarget - Return the current instance of the Target class.
129 ///
130 CodeGenTarget::CodeGenTarget() {
131 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
132 if (Targets.size() == 0)
133 throw std::string("ERROR: No 'Target' subclasses defined!");
134 if (Targets.size() != 1)
135 throw std::string("ERROR: Multiple subclasses of Target defined!");
136 TargetRec = Targets[0];
137 }
138
139
140 const std::string &CodeGenTarget::getName() const {
141 return TargetRec->getName();
142 }
143
144 std::string CodeGenTarget::getInstNamespace() const {
145 std::string InstNS;
146
147 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
148 InstNS = i->second.Namespace;
149
150 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
151 // the namespace off the PHI instruction or something.
152 if (InstNS != "TargetInstrInfo")
153 break;
154 }
155
156 return InstNS;
157 }
158
159 Record *CodeGenTarget::getInstructionSet() const {
160 return TargetRec->getValueAsDef("InstructionSet");
161 }
162
163 /// getAsmWriter - Return the AssemblyWriter definition for this target.
164 ///
165 Record *CodeGenTarget::getAsmWriter() const {
166 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
167 if (AsmWriterNum >= LI.size())
168 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
169 return LI[AsmWriterNum];
170 }
171
172 void CodeGenTarget::ReadRegisters() const {
173 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
174 if (Regs.empty())
175 throw std::string("No 'Register' subclasses defined!");
176
177 Registers.reserve(Regs.size());
178 Registers.assign(Regs.begin(), Regs.end());
179 }
180
181 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
182 DeclaredSpillSize = R->getValueAsInt("SpillSize");
183 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
184 }
185
186 const std::string &CodeGenRegister::getName() const {
187 return TheDef->getName();
188 }
189
190 void CodeGenTarget::ReadRegisterClasses() const {
191 std::vector<Record*> RegClasses =
192 Records.getAllDerivedDefinitions("RegisterClass");
193 if (RegClasses.empty())
194 throw std::string("No 'RegisterClass' subclasses defined!");
195
196 RegisterClasses.reserve(RegClasses.size());
197 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
198 }
199
200 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
201 std::vector<unsigned char> Result;
202 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
203 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
204 const CodeGenRegisterClass &RC = RegisterClasses[i];
205 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
206 if (R == RC.Elements[ei]) {
207 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
208 for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
209 Result.push_back(InVTs[i]);
210 }
211 }
212 }
213 return Result;
214 }
215
216
217 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
218 // Rename anonymous register classes.
219 if (R->getName().size() > 9 && R->getName()[9] == '.') {
220 static unsigned AnonCounter = 0;
221 R->setName("AnonRegClass_"+utostr(AnonCounter++));
222 }
223
224 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
225 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
226 Record *Type = TypeList[i];
227 if (!Type->isSubClassOf("ValueType"))
228 throw "RegTypes list member '" + Type->getName() +
229 "' does not derive from the ValueType class!";
230 VTs.push_back(getValueType(Type));
231 }
232 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
233
234 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
235 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
236 Record *Reg = RegList[i];
237 if (!Reg->isSubClassOf("Register"))
238 throw "Register Class member '" + Reg->getName() +
239 "' does not derive from the Register class!";
240 Elements.push_back(Reg);
241 }
242
243 std::vector<Record*> SubRegClassList =
244 R->getValueAsListOfDefs("SubRegClassList");
245 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
246 Record *SubRegClass = SubRegClassList[i];
247 if (!SubRegClass->isSubClassOf("RegisterClass"))
248 throw "Register Class member '" + SubRegClass->getName() +
249 "' does not derive from the RegisterClass class!";
250 SubRegClasses.push_back(SubRegClass);
251 }
252
253 // Allow targets to override the size in bits of the RegisterClass.
254 unsigned Size = R->getValueAsInt("Size");
255
256 Namespace = R->getValueAsString("Namespace");
257 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits();
258 SpillAlignment = R->getValueAsInt("Alignment");
259 CopyCost = R->getValueAsInt("CopyCost");
260 MethodBodies = R->getValueAsCode("MethodBodies");
261 MethodProtos = R->getValueAsCode("MethodProtos");
262 }
263
264 const std::string &CodeGenRegisterClass::getName() const {
265 return TheDef->getName();
266 }
267
268 void CodeGenTarget::ReadLegalValueTypes() const {
269 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
270 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
271 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
272 LegalValueTypes.push_back(RCs[i].VTs[ri]);
273
274 // Remove duplicates.
275 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
276 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
277 LegalValueTypes.end()),
278 LegalValueTypes.end());
279 }
280
281
282 void CodeGenTarget::ReadInstructions() const {
283 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
284 if (Insts.size() <= 2)
285 throw std::string("No 'Instruction' subclasses defined!");
286
287 // Parse the instructions defined in the .td file.
288 std::string InstFormatName =
289 getAsmWriter()->getValueAsString("InstFormatName");
290
291 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
292 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
293 Instructions.insert(std::make_pair(Insts[i]->getName(),
294 CodeGenInstruction(Insts[i], AsmStr)));
295 }
296 }
297
298 /// getInstructionsByEnumValue - Return all of the instructions defined by the
299 /// target, ordered by their enum value.
300 void CodeGenTarget::
301 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
302 &NumberedInstructions) {
303 std::map<std::string, CodeGenInstruction>::const_iterator I;
304 I = getInstructions().find("PHI");
305 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
306 const CodeGenInstruction *PHI = &I->second;
307
308 I = getInstructions().find("INLINEASM");
309 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
310 const CodeGenInstruction *INLINEASM = &I->second;
311
312 I = getInstructions().find("DBG_LABEL");
313 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
314 const CodeGenInstruction *DBG_LABEL = &I->second;
315
316 I = getInstructions().find("EH_LABEL");
317 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
318 const CodeGenInstruction *EH_LABEL = &I->second;
319
320 I = getInstructions().find("GC_LABEL");
321 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
322 const CodeGenInstruction *GC_LABEL = &I->second;
323
324 I = getInstructions().find("DECLARE");
325 if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
326 const CodeGenInstruction *DECLARE = &I->second;
327
328 I = getInstructions().find("EXTRACT_SUBREG");
329 if (I == Instructions.end())
330 throw "Could not find 'EXTRACT_SUBREG' instruction!";
331 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
332
333 I = getInstructions().find("INSERT_SUBREG");
334 if (I == Instructions.end())
335 throw "Could not find 'INSERT_SUBREG' instruction!";
336 const CodeGenInstruction *INSERT_SUBREG = &I->second;
337
338 I = getInstructions().find("IMPLICIT_DEF");
339 if (I == Instructions.end())
340 throw "Could not find 'IMPLICIT_DEF' instruction!";
341 const CodeGenInstruction *IMPLICIT_DEF = &I->second;
342
343 I = getInstructions().find("SUBREG_TO_REG");
344 if (I == Instructions.end())
345 throw "Could not find 'SUBREG_TO_REG' instruction!";
346 const CodeGenInstruction *SUBREG_TO_REG = &I->second;
347
348 I = getInstructions().find("COPY_TO_REGCLASS");
349 if (I == Instructions.end())
350 throw "Could not find 'COPY_TO_REGCLASS' instruction!";
351 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
352
353 // Print out the rest of the instructions now.
354 NumberedInstructions.push_back(PHI);
355 NumberedInstructions.push_back(INLINEASM);
356 NumberedInstructions.push_back(DBG_LABEL);
357 NumberedInstructions.push_back(EH_LABEL);
358 NumberedInstructions.push_back(GC_LABEL);
359 NumberedInstructions.push_back(DECLARE);
360 NumberedInstructions.push_back(EXTRACT_SUBREG);
361 NumberedInstructions.push_back(INSERT_SUBREG);
362 NumberedInstructions.push_back(IMPLICIT_DEF);
363 NumberedInstructions.push_back(SUBREG_TO_REG);
364 NumberedInstructions.push_back(COPY_TO_REGCLASS);
365 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
366 if (&II->second != PHI &&
367 &II->second != INLINEASM &&
368 &II->second != DBG_LABEL &&
369 &II->second != EH_LABEL &&
370 &II->second != GC_LABEL &&
371 &II->second != DECLARE &&
372 &II->second != EXTRACT_SUBREG &&
373 &II->second != INSERT_SUBREG &&
374 &II->second != IMPLICIT_DEF &&
375 &II->second != SUBREG_TO_REG &&
376 &II->second != COPY_TO_REGCLASS)
377 NumberedInstructions.push_back(&II->second);
378 }
379
380
381 /// isLittleEndianEncoding - Return whether this target encodes its instruction
382 /// in little-endian format, i.e. bits laid out in the order [0..n]
383 ///
384 bool CodeGenTarget::isLittleEndianEncoding() const {
385 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
386 }
387
388 //===----------------------------------------------------------------------===//
389 // ComplexPattern implementation
390 //
391 ComplexPattern::ComplexPattern(Record *R) {
392 Ty = ::getValueType(R->getValueAsDef("Ty"));
393 NumOperands = R->getValueAsInt("NumOperands");
394 SelectFunc = R->getValueAsString("SelectFunc");
395 RootNodes = R->getValueAsListOfDefs("RootNodes");
396
397 // Parse the properties.
398 Properties = 0;
399 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
400 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
401 if (PropList[i]->getName() == "SDNPHasChain") {
402 Properties |= 1 << SDNPHasChain;
403 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
404 Properties |= 1 << SDNPOptInFlag;
405 } else if (PropList[i]->getName() == "SDNPMayStore") {
406 Properties |= 1 << SDNPMayStore;
407 } else if (PropList[i]->getName() == "SDNPMayLoad") {
408 Properties |= 1 << SDNPMayLoad;
409 } else if (PropList[i]->getName() == "SDNPSideEffect") {
410 Properties |= 1 << SDNPSideEffect;
411 } else if (PropList[i]->getName() == "SDNPMemOperand") {
412 Properties |= 1 << SDNPMemOperand;
413 } else {
414 cerr << "Unsupported SD Node property '" << PropList[i]->getName()
415 << "' on ComplexPattern '" << R->getName() << "'!\n";
416 exit(1);
417 }
418
419 // Parse the attributes.
420 Attributes = 0;
421 PropList = R->getValueAsListOfDefs("Attributes");
422 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
423 if (PropList[i]->getName() == "CPAttrParentAsRoot") {
424 Attributes |= 1 << CPAttrParentAsRoot;
425 } else {
426 cerr << "Unsupported pattern attribute '" << PropList[i]->getName()
427 << "' on ComplexPattern '" << R->getName() << "'!\n";
428 exit(1);
429 }
430 }
431
432 //===----------------------------------------------------------------------===//
433 // CodeGenIntrinsic Implementation
434 //===----------------------------------------------------------------------===//
435
436 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
437 bool TargetOnly) {
438 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
439
440 std::vector<CodeGenIntrinsic> Result;
441
442 for (unsigned i = 0, e = I.size(); i != e; ++i) {
443 bool isTarget = I[i]->getValueAsBit("isTarget");
444 if (isTarget == TargetOnly)
445 Result.push_back(CodeGenIntrinsic(I[i]));
446 }
447 return Result;
448 }
449
450 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
451 TheDef = R;
452 std::string DefName = R->getName();
453 ModRef = WriteMem;
454 isOverloaded = false;
455 isCommutative = false;
456
457 if (DefName.size() <= 4 ||
458 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
459 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
460
461 EnumName = std::string(DefName.begin()+4, DefName.end());
462
463 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
464 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
465
466 TargetPrefix = R->getValueAsString("TargetPrefix");
467 Name = R->getValueAsString("LLVMName");
468
469 if (Name == "") {
470 // If an explicit name isn't specified, derive one from the DefName.
471 Name = "llvm.";
472
473 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
474 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
475 } else {
476 // Verify it starts with "llvm.".
477 if (Name.size() <= 5 ||
478 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
479 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
480 }
481
482 // If TargetPrefix is specified, make sure that Name starts with
483 // "llvm.<targetprefix>.".
484 if (!TargetPrefix.empty()) {
485 if (Name.size() < 6+TargetPrefix.size() ||
486 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
487 != (TargetPrefix + "."))
488 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
489 TargetPrefix + ".'!";
490 }
491
492 // Parse the list of return types.
493 std::vector<MVT::SimpleValueType> OverloadedVTs;
494 ListInit *TypeList = R->getValueAsListInit("RetTypes");
495 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
496 Record *TyEl = TypeList->getElementAsRecord(i);
497 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
498 MVT::SimpleValueType VT;
499 if (TyEl->isSubClassOf("LLVMMatchType")) {
500 unsigned MatchTy = TyEl->getValueAsInt("Number");
501 assert(MatchTy < OverloadedVTs.size() &&
502 "Invalid matching number!");
503 VT = OverloadedVTs[MatchTy];
504 // It only makes sense to use the extended and truncated vector element
505 // variants with iAny types; otherwise, if the intrinsic is not
506 // overloaded, all the types can be specified directly.
507 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
508 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
509 VT == MVT::iAny) && "Expected iAny type");
510 } else {
511 VT = getValueType(TyEl->getValueAsDef("VT"));
512 }
513 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
514 OverloadedVTs.push_back(VT);
515 isOverloaded |= true;
516 }
517 IS.RetVTs.push_back(VT);
518 IS.RetTypeDefs.push_back(TyEl);
519 }
520
521 if (IS.RetVTs.size() == 0)
522 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
523
524 // Parse the list of parameter types.
525 TypeList = R->getValueAsListInit("ParamTypes");
526 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
527 Record *TyEl = TypeList->getElementAsRecord(i);
528 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
529 MVT::SimpleValueType VT;
530 if (TyEl->isSubClassOf("LLVMMatchType")) {
531 unsigned MatchTy = TyEl->getValueAsInt("Number");
532 assert(MatchTy < OverloadedVTs.size() &&
533 "Invalid matching number!");
534 VT = OverloadedVTs[MatchTy];
535 // It only makes sense to use the extended and truncated vector element
536 // variants with iAny types; otherwise, if the intrinsic is not
537 // overloaded, all the types can be specified directly.
538 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
539 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
540 VT == MVT::iAny) && "Expected iAny type");
541 } else
542 VT = getValueType(TyEl->getValueAsDef("VT"));
543 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
544 OverloadedVTs.push_back(VT);
545 isOverloaded |= true;
546 }
547 IS.ParamVTs.push_back(VT);
548 IS.ParamTypeDefs.push_back(TyEl);
549 }
550
551 // Parse the intrinsic properties.
552 ListInit *PropList = R->getValueAsListInit("Properties");
553 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
554 Record *Property = PropList->getElementAsRecord(i);
555 assert(Property->isSubClassOf("IntrinsicProperty") &&
556 "Expected a property!");
557
558 if (Property->getName() == "IntrNoMem")
559 ModRef = NoMem;
560 else if (Property->getName() == "IntrReadArgMem")
561 ModRef = ReadArgMem;
562 else if (Property->getName() == "IntrReadMem")
563 ModRef = ReadMem;
564 else if (Property->getName() == "IntrWriteArgMem")
565 ModRef = WriteArgMem;
566 else if (Property->getName() == "IntrWriteMem")
567 ModRef = WriteMem;
568 else if (Property->getName() == "Commutative")
569 isCommutative = true;
570 else if (Property->isSubClassOf("NoCapture")) {
571 unsigned ArgNo = Property->getValueAsInt("ArgNo");
572 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
573 } else
574 assert(0 && "Unknown property!");
575 }
576 }
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