1 //===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MSP430 target.
12 //===----------------------------------------------------------------------===//
15 #include "MSP430ISelLowering.h"
16 #include "MSP430TargetMachine.h"
17 #include "llvm/DerivedTypes.h"
18 #include "llvm/Function.h"
19 #include "llvm/Intrinsics.h"
20 #include "llvm/CallingConv.h"
21 #include "llvm/Constants.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/SelectionDAG.h"
27 #include "llvm/CodeGen/SelectionDAGISel.h"
28 #include "llvm/Target/TargetLowering.h"
29 #include "llvm/Support/Compiler.h"
30 #include "llvm/Support/Debug.h"
35 /// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
36 /// instructions for SelectionDAG operations.
39 class MSP430DAGToDAGISel
: public SelectionDAGISel
{
40 MSP430TargetLowering
&Lowering
;
41 const MSP430Subtarget
&Subtarget
;
44 MSP430DAGToDAGISel(MSP430TargetMachine
&TM
)
45 : SelectionDAGISel(TM
),
46 Lowering(*TM
.getTargetLowering()),
47 Subtarget(*TM
.getSubtargetImpl()) { }
49 virtual void InstructionSelect();
51 virtual const char *getPassName() const {
52 return "MSP430 DAG->DAG Pattern Instruction Selection";
55 // Include the pieces autogenerated from the target description.
56 #include "MSP430GenDAGISel.inc"
59 SDNode
*Select(SDValue Op
);
60 bool SelectAddr(SDValue Op
, SDValue Addr
, SDValue
&Disp
, SDValue
&Base
);
66 } // end anonymous namespace
68 /// createMSP430ISelDag - This pass converts a legalized DAG into a
69 /// MSP430-specific DAG, ready for instruction scheduling.
71 FunctionPass
*llvm::createMSP430ISelDag(MSP430TargetMachine
&TM
) {
72 return new MSP430DAGToDAGISel(TM
);
75 bool MSP430DAGToDAGISel::SelectAddr(SDValue Op
, SDValue Addr
,
76 SDValue
&Disp
, SDValue
&Base
) {
77 // We don't support frame index stuff yet.
78 if (isa
<FrameIndexSDNode
>(Addr
))
81 // Operand is a result from ADD with constant operand which fits into i16.
82 if (Addr
.getOpcode() == ISD::ADD
) {
83 if (ConstantSDNode
*CN
= dyn_cast
<ConstantSDNode
>(Addr
.getOperand(1))) {
84 uint64_t CVal
= CN
->getZExtValue();
85 // Offset should fit into 16 bits.
86 if (((CVal
<< 48) >> 48) == CVal
) {
87 // We don't support frame index stuff yet.
88 if (isa
<FrameIndexSDNode
>(Addr
.getOperand(0)))
91 Base
= Addr
.getOperand(0);
92 Disp
= CurDAG
->getTargetConstant(CVal
, MVT::i16
);
100 Disp
= CurDAG
->getTargetConstant(0, MVT::i16
);
107 /// InstructionSelect - This callback is invoked by
108 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
109 void MSP430DAGToDAGISel::InstructionSelect() {
112 // Select target instructions for the DAG.
115 CurDAG
->RemoveDeadNodes();
118 SDNode
*MSP430DAGToDAGISel::Select(SDValue Op
) {
119 SDNode
*Node
= Op
.getNode();
121 // Dump information about the Node being selected
123 DOUT
<< std::string(Indent
, ' ') << "Selecting: ";
124 DEBUG(Node
->dump(CurDAG
));
129 // If we have a custom node, we already have selected!
130 if (Node
->isMachineOpcode()) {
132 DOUT
<< std::string(Indent
-2, ' ') << "== ";
133 DEBUG(Node
->dump(CurDAG
));
140 // Instruction Selection not handled by the auto-generated tablegen selection
141 // should be handled here.
142 // Something like this:
143 // unsigned Opcode = Node->getOpcode();
147 // return SelectFoo(Node)
150 // Select the default instruction
151 SDNode
*ResNode
= SelectCode(Op
);
154 DOUT
<< std::string(Indent
-2, ' ') << "=> ";
155 if (ResNode
== NULL
|| ResNode
== Op
.getNode())
156 DEBUG(Op
.getNode()->dump(CurDAG
));
158 DEBUG(ResNode
->dump(CurDAG
));