lib/Target/IA64/IA64InstrInfo.h

   1 //===- IA64InstrInfo.h - IA64 Instruction Information ----------*- C++ -*- ===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the IA64 implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef IA64INSTRUCTIONINFO_H
  15 #define IA64INSTRUCTIONINFO_H
  16
  17 #include "llvm/Target/TargetInstrInfo.h"
  18 #include "IA64RegisterInfo.h"
  19
  20 namespace llvm {
  21
  22 class IA64InstrInfo : public TargetInstrInfoImpl {
  23   const IA64RegisterInfo RI;
  24 public:
  25   IA64InstrInfo();
  26
  27   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
  28   /// such, whenever a client has an instance of instruction info, it should
  29   /// always be able to get register info as well (through this method).
  30   ///
  31   virtual const IA64RegisterInfo &getRegisterInfo() const { return RI; }
  32
  33   /// Return true if the instruction is a register to register move and return
  34   /// the source and dest operands and their sub-register indices by reference.
  35   virtual bool isMoveInstr(const MachineInstr &MI,
  36                            unsigned &SrcReg, unsigned &DstReg,
  37                            unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
  38   virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
  39                                 MachineBasicBlock *FBB,
  40                             const SmallVectorImpl<MachineOperand> &Cond) const;
  41   virtual bool copyRegToReg(MachineBasicBlock &MBB,
  42                             MachineBasicBlock::iterator MI,
  43                             unsigned DestReg, unsigned SrcReg,
  44                             const TargetRegisterClass *DestRC,
  45                             const TargetRegisterClass *SrcRC) const;
  46   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
  47                                    MachineBasicBlock::iterator MI,
  48                                    unsigned SrcReg, bool isKill, int FrameIndex,
  49                                    const TargetRegisterClass *RC) const;
  50
  51   virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
  52                               SmallVectorImpl<MachineOperand> &Addr,
  53                               const TargetRegisterClass *RC,
  54                               SmallVectorImpl<MachineInstr*> &NewMIs) const;
  55
  56   virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
  57                                     MachineBasicBlock::iterator MI,
  58                                     unsigned DestReg, int FrameIndex,
  59                                     const TargetRegisterClass *RC) const;
  60
  61   virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
  62                                SmallVectorImpl<MachineOperand> &Addr,
  63                                const TargetRegisterClass *RC,
  64                                SmallVectorImpl<MachineInstr*> &NewMIs) const;
  65 };
  66
  67 } // End llvm namespace
  68
  69 #endif
  70