lib/CodeGen/RegAllocSimple.cpp

   1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a simple register allocator. *Very* simple: It immediate
  11 // spills every value right after it is computed, and it reloads all used
  12 // operands from the spill area to temporary registers before each instruction.
  13 // It does not keep values in registers across instructions.
  14 //
  15 //===----------------------------------------------------------------------===//
  16
  17 #define DEBUG_TYPE "regalloc"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/CodeGen/MachineFunctionPass.h"
  20 #include "llvm/CodeGen/MachineInstr.h"
  21 #include "llvm/CodeGen/MachineFrameInfo.h"
  22 #include "llvm/CodeGen/MachineRegisterInfo.h"
  23 #include "llvm/CodeGen/RegAllocRegistry.h"
  24 #include "llvm/Target/TargetInstrInfo.h"
  25 #include "llvm/Target/TargetMachine.h"
  26 #include "llvm/Support/Debug.h"
  27 #include "llvm/Support/Compiler.h"
  28 #include "llvm/ADT/Statistic.h"
  29 #include "llvm/ADT/STLExtras.h"
  30 #include <map>
  31 using namespace llvm;
  32
  33 STATISTIC(NumStores, "Number of stores added");
  34 STATISTIC(NumLoads , "Number of loads added");
  35
  36 namespace {
  37   static RegisterRegAlloc
  38     simpleRegAlloc("simple", "simple register allocator",
  39                    createSimpleRegisterAllocator);
  40
  41   class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
  42   public:
  43     static char ID;
  44     RegAllocSimple() : MachineFunctionPass(&ID) {}
  45   private:
  46     MachineFunction *MF;
  47     const TargetMachine *TM;
  48     const TargetRegisterInfo *TRI;
  49     const TargetInstrInfo *TII;
  50
  51     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
  52     // these values are spilled
  53     std::map<unsigned, int> StackSlotForVirtReg;
  54
  55     // RegsUsed - Keep track of what registers are currently in use.  This is a
  56     // bitset.
  57     std::vector<bool> RegsUsed;
  58
  59     // RegClassIdx - Maps RegClass => which index we can take a register
  60     // from. Since this is a simple register allocator, when we need a register
  61     // of a certain class, we just take the next available one.
  62     std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
  63
  64   public:
  65     virtual const char *getPassName() const {
  66       return "Simple Register Allocator";
  67     }
  68
  69     /// runOnMachineFunction - Register allocate the whole function
  70     bool runOnMachineFunction(MachineFunction &Fn);
  71
  72     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  73       AU.addRequiredID(PHIEliminationID);           // Eliminate PHI nodes
  74       MachineFunctionPass::getAnalysisUsage(AU);
  75     }
  76   private:
  77     /// AllocateBasicBlock - Register allocate the specified basic block.
  78     void AllocateBasicBlock(MachineBasicBlock &MBB);
  79
  80     /// getStackSpaceFor - This returns the offset of the specified virtual
  81     /// register on the stack, allocating space if necessary.
  82     int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
  83
  84     /// Given a virtual register, return a compatible physical register that is
  85     /// currently unused.
  86     ///
  87     /// Side effect: marks that register as being used until manually cleared
  88     ///
  89     unsigned getFreeReg(unsigned virtualReg);
  90
  91     /// Moves value from memory into that register
  92     unsigned reloadVirtReg(MachineBasicBlock &MBB,
  93                            MachineBasicBlock::iterator I, unsigned VirtReg);
  94
  95     /// Saves reg value on the stack (maps virtual register to stack value)
  96     void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  97                       unsigned VirtReg, unsigned PhysReg);
  98   };
  99   char RegAllocSimple::ID = 0;
 100 }
 101
 102 /// getStackSpaceFor - This allocates space for the specified virtual
 103 /// register to be held on the stack.
 104 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
 105                                      const TargetRegisterClass *RC) {
 106   // Find the location VirtReg would belong...
 107   std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
 108
 109   if (I != StackSlotForVirtReg.end())
 110     return I->second;          // Already has space allocated?
 111
 112   // Allocate a new stack object for this spill location...
 113   int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
 114                                                        RC->getAlignment());
 115
 116   // Assign the slot...
 117   StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
 118
 119   return FrameIdx;
 120 }
 121
 122 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
 123   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtualReg);
 124   TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
 125 #ifndef NDEBUG
 126   TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
 127 #endif
 128
 129   while (1) {
 130     unsigned regIdx = RegClassIdx[RC]++;
 131     assert(RI+regIdx != RE && "Not enough registers!");
 132     unsigned PhysReg = *(RI+regIdx);
 133
 134     if (!RegsUsed[PhysReg]) {
 135       MF->getRegInfo().setPhysRegUsed(PhysReg);
 136       return PhysReg;
 137     }
 138   }
 139 }
 140
 141 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
 142                                        MachineBasicBlock::iterator I,
 143                                        unsigned VirtReg) {
 144   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
 145   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 146   unsigned PhysReg = getFreeReg(VirtReg);
 147
 148   // Add move instruction(s)
 149   ++NumLoads;
 150   TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
 151   return PhysReg;
 152 }
 153
 154 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
 155                                   MachineBasicBlock::iterator I,
 156                                   unsigned VirtReg, unsigned PhysReg) {
 157   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
 158
 159   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 160
 161   // Add move instruction(s)
 162   ++NumStores;
 163   TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIdx, RC);
 164 }
 165
 166
 167 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
 168   // loop over each instruction
 169   for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
 170     // Made to combat the incorrect allocation of r2 = add r1, r1
 171     std::map<unsigned, unsigned> Virt2PhysRegMap;
 172
 173     RegsUsed.resize(TRI->getNumRegs());
 174
 175     // This is a preliminary pass that will invalidate any registers that are
 176     // used by the instruction (including implicit uses).
 177     const TargetInstrDesc &Desc = MI->getDesc();
 178     const unsigned *Regs;
 179     if (Desc.ImplicitUses) {
 180       for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
 181         RegsUsed[*Regs] = true;
 182     }
 183
 184     if (Desc.ImplicitDefs) {
 185       for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
 186         RegsUsed[*Regs] = true;
 187         MF->getRegInfo().setPhysRegUsed(*Regs);
 188       }
 189     }
 190
 191     // Loop over uses, move from memory into registers.
 192     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
 193       MachineOperand &MO = MI->getOperand(i);
 194
 195       if (MO.isReg() && MO.getReg() &&
 196           TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
 197         unsigned virtualReg = (unsigned) MO.getReg();
 198         DOUT << "op: " << MO << "\n";
 199         DOUT << "\t inst[" << i << "]: ";
 200         DEBUG(MI->print(*cerr.stream(), TM));
 201
 202         // make sure the same virtual register maps to the same physical
 203         // register in any given instruction
 204         unsigned physReg = Virt2PhysRegMap[virtualReg];
 205         if (physReg == 0) {
 206           if (MO.isDef()) {
 207             unsigned TiedOp;
 208             if (!MI->isRegTiedToUseOperand(i, &TiedOp)) {
 209               physReg = getFreeReg(virtualReg);
 210             } else {
 211               // must be same register number as the source operand that is
 212               // tied to. This maps a = b + c into b = b + c, and saves b into
 213               // a's spot.
 214               assert(MI->getOperand(TiedOp).isReg()  &&
 215                      MI->getOperand(TiedOp).getReg() &&
 216                      MI->getOperand(TiedOp).isUse() &&
 217                      "Two address instruction invalid!");
 218
 219               physReg = MI->getOperand(TiedOp).getReg();
 220             }
 221             spillVirtReg(MBB, next(MI), virtualReg, physReg);
 222           } else {
 223             physReg = reloadVirtReg(MBB, MI, virtualReg);
 224             Virt2PhysRegMap[virtualReg] = physReg;
 225           }
 226         }
 227         MO.setReg(physReg);
 228         DOUT << "virt: " << virtualReg << ", phys: " << MO.getReg() << "\n";
 229       }
 230     }
 231     RegClassIdx.clear();
 232     RegsUsed.clear();
 233   }
 234 }
 235
 236
 237 /// runOnMachineFunction - Register allocate the whole function
 238 ///
 239 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
 240   DOUT << "Machine Function\n";
 241   MF = &Fn;
 242   TM = &MF->getTarget();
 243   TRI = TM->getRegisterInfo();
 244   TII = TM->getInstrInfo();
 245
 246   // Loop over all of the basic blocks, eliminating virtual register references
 247   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
 248        MBB != MBBe; ++MBB)
 249     AllocateBasicBlock(*MBB);
 250
 251   StackSlotForVirtReg.clear();
 252   return true;
 253 }
 254
 255 FunctionPass *llvm::createSimpleRegisterAllocator() {
 256   return new RegAllocSimple();
 257 }