Add proper ISD::RET lowering
[llvm/msp430.git] / lib / Target / TargetInstrInfo.cpp
blob1bdeef400970bdeb8f3c828d19fa77e5811df44e
1 //===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetInstrInfo.h"
15 #include "llvm/Constant.h"
16 #include "llvm/DerivedTypes.h"
17 using namespace llvm;
19 TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
20 unsigned numOpcodes)
21 : Descriptors(Desc), NumOpcodes(numOpcodes) {
24 TargetInstrInfo::~TargetInstrInfo() {
27 bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
28 const TargetInstrDesc &TID = MI->getDesc();
29 if (!TID.isTerminator()) return false;
31 // Conditional branch is a special case.
32 if (TID.isBranch() && !TID.isBarrier())
33 return true;
34 if (!TID.isPredicable())
35 return true;
36 return !isPredicated(MI);