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In some rare cases, the register allocator can spill registers but end up not utilizi...
[llvm/msp430.git]
/
test
/
CodeGen
/
Alpha
/
not.ll
blob
cea9f6bc95f5863694d5801cfdb0da56dc80ef8c
1
; Make sure this testcase codegens to the ornot instruction
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; RUN: llvm-as < %s | llc -march=alpha | grep eqv
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define i64 @bar(i64 %x) {
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entry:
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%tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}