In some rare cases, the register allocator can spill registers but end up not utilizi...
[llvm/msp430.git] / test / CodeGen / X86 / 2008-08-19-SubAndFetch.ll
blob00bcdf82e8ddda1009acec71bd2c785f7dbb6204
1 ; RUN: llvm-as < %s | llc -march=x86-64 | grep xadd
3 @var = external global i64              ; <i64*> [#uses=1]
5 define i32 @main() nounwind {
6 entry:
7         tail call i64 @llvm.atomic.load.sub.i64.p0i64( i64* @var, i64 1 )               ; <i64>:0 [#uses=0]
8         unreachable
11 declare i64 @llvm.atomic.load.sub.i64.p0i64(i64*, i64) nounwind