In some rare cases, the register allocator can spill registers but end up not utilizi...
[llvm/msp430.git] / test / CodeGen / X86 / 2008-12-16-BadShift.ll
blob46b70188c8fefb32a4baf95069865c685591f0b4
1 ; RUN: llvm-as < %s | llc | not grep shrl
2 ; Note: this test is really trying to make sure that the shift
3 ; returns the right result; shrl is most likely wrong,
4 ; but if CodeGen starts legitimately using an shrl here,
5 ; please adjust the test appropriately.
7 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
8 target triple = "i386-pc-linux-gnu"
9 @.str = internal constant [6 x i8] c"%lld\0A\00"                ; <[6 x i8]*> [#uses=1]
11 define i64 @mebbe_shift(i32 %xx, i32 %test) nounwind {
12 entry:
13         %conv = zext i32 %xx to i64             ; <i64> [#uses=1]
14         %tobool = icmp ne i32 %test, 0          ; <i1> [#uses=1]
15         %shl = select i1 %tobool, i64 3, i64 0          ; <i64> [#uses=1]
16         %x.0 = shl i64 %conv, %shl              ; <i64> [#uses=1]
17         ret i64 %x.0