In some rare cases, the register allocator can spill registers but end up not utilizi...

[llvm/msp430.git] / test / CodeGen / X86 / negative_zero.ll

; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3 | grep fchs


define double @T() {
        ret double -1.0   ;; codegen as fld1/fchs, not as a load from cst pool
}