In some rare cases, the register allocator can spill registers but end up not utilizi...

[llvm/msp430.git] / test / CodeGen / X86 / sfence.ll

; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep sfence

declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)

define void @test() {
        call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true)
        ret void
}