lib/Target/MSP430/MSP430RegisterInfo.cpp

   1 //===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the MSP430 implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "msp430-reg-info"
  15
  16 #include "MSP430.h"
  17 #include "MSP430RegisterInfo.h"
  18 #include "MSP430TargetMachine.h"
  19 #include "llvm/CodeGen/MachineFrameInfo.h"
  20 #include "llvm/CodeGen/MachineFunction.h"
  21 #include "llvm/CodeGen/MachineInstrBuilder.h"
  22 #include "llvm/Target/TargetMachine.h"
  23 #include "llvm/Target/TargetOptions.h"
  24 #include "llvm/ADT/BitVector.h"
  25
  26 using namespace llvm;
  27
  28 // FIXME: Provide proper call frame setup / destroy opcodes.
  29 MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm,
  30                                        const TargetInstrInfo &tii)
  31   : MSP430GenRegisterInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
  32     TM(tm), TII(tii) {
  33   StackAlign = TM.getFrameInfo()->getStackAlignment();
  34 }
  35
  36 const unsigned*
  37 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
  38   static const unsigned CalleeSavedRegs[] = {
  39     MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
  40     MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
  41     0
  42   };
  43
  44   return CalleeSavedRegs;
  45 }
  46
  47 const TargetRegisterClass* const*
  48 MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
  49   static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
  50     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  51     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  52     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  53     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  54     0
  55   };
  56
  57   return CalleeSavedRegClasses;
  58 }
  59
  60 BitVector
  61 MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  62   BitVector Reserved(getNumRegs());
  63
  64   // Mark 4 special registers as reserved.
  65   Reserved.set(MSP430::PCW);
  66   Reserved.set(MSP430::SPW);
  67   Reserved.set(MSP430::SRW);
  68   Reserved.set(MSP430::CGW);
  69
  70   // Mark frame pointer as reserved if needed.
  71   if (hasFP(MF))
  72     Reserved.set(MSP430::FPW);
  73
  74   return Reserved;
  75 }
  76
  77 bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
  78   return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
  79 }
  80
  81 bool MSP430RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
  82   return !MF.getFrameInfo()->hasVarSizedObjects();
  83 }
  84
  85 void MSP430RegisterInfo::
  86 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
  87                               MachineBasicBlock::iterator I) const {
  88   if (!hasReservedCallFrame(MF)) {
  89     // If the stack pointer can be changed after prologue, turn the
  90     // adjcallstackup instruction into a 'sub SPW, <amt>' and the
  91     // adjcallstackdown instruction into 'add SPW, <amt>'
  92     // TODO: consider using push / pop instead of sub + store / add
  93     MachineInstr *Old = I;
  94     uint64_t Amount = Old->getOperand(0).getImm();
  95     if (Amount != 0) {
  96       // We need to keep the stack aligned properly.  To do this, we round the
  97       // amount of space needed for the outgoing arguments up to the next
  98       // alignment boundary.
  99       Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
 100
 101       MachineInstr *New = 0;
 102       if (Old->getOpcode() == getCallFrameSetupOpcode()) {
 103         New = BuildMI(MF, Old->getDebugLoc(),
 104                       TII.get(MSP430::SUB16ri), MSP430::SPW)
 105           .addReg(MSP430::SPW).addImm(Amount);
 106       } else {
 107         assert(Old->getOpcode() == getCallFrameDestroyOpcode());
 108         // factor out the amount the callee already popped.
 109         uint64_t CalleeAmt = Old->getOperand(1).getImm();
 110         Amount -= CalleeAmt;
 111         if (Amount)
 112           New = BuildMI(MF, Old->getDebugLoc(),
 113                         TII.get(MSP430::ADD16ri), MSP430::SPW)
 114             .addReg(MSP430::SPW).addImm(Amount);
 115       }
 116
 117       if (New) {
 118         // The SRW implicit def is dead.
 119         New->getOperand(3).setIsDead();
 120
 121         // Replace the pseudo instruction with a new instruction...
 122         MBB.insert(I, New);
 123       }
 124     }
 125   } else if (I->getOpcode() == getCallFrameDestroyOpcode()) {
 126     // If we are performing frame pointer elimination and if the callee pops
 127     // something off the stack pointer, add it back.
 128     if (uint64_t CalleeAmt = I->getOperand(1).getImm()) {
 129       MachineInstr *Old = I;
 130       MachineInstr *New =
 131         BuildMI(MF, Old->getDebugLoc(), TII.get(MSP430::SUB16ri),
 132                 MSP430::SPW).addReg(MSP430::SPW).addImm(CalleeAmt);
 133       // The SRW implicit def is dead.
 134       New->getOperand(3).setIsDead();
 135
 136       MBB.insert(I, New);
 137     }
 138   }
 139
 140   MBB.erase(I);
 141 }
 142
 143 void
 144 MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
 145                                         int SPAdj, RegScavenger *RS) const {
 146   assert(0 && "Not implemented yet!");
 147 }
 148
 149 void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const {
 150   // Nothing here yet
 151 }
 152
 153 void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
 154                                       MachineBasicBlock &MBB) const {
 155   // Nothing here yet
 156 }
 157
 158 unsigned MSP430RegisterInfo::getRARegister() const {
 159   assert(0 && "Not implemented yet!");
 160 }
 161
 162 unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const {
 163   assert(0 && "Not implemented yet!");
 164 }
 165
 166 int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
 167   assert(0 && "Not implemented yet!");
 168 }
 169
 170 #include "MSP430GenRegisterInfo.inc"