3 - Hook up If-Conversion a la ARM target
4 - Hook up all branch analysis functions
5 - Instruction scheduling
8 - Testing and bugfixing
9 - stop passing FP args in both FP *and* integer regs when not required
10 - allocate low (nonstacked) registers more aggressively
11 - clean up and thoroughly test the isel patterns.
12 - fix stacked register allocation order: (for readability) we don't want
13 the out? registers being the first ones used
14 - fix up floating point
15 (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
17 (we will avoid the mess that is:
18 http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
19 - instruction scheduling (hmmmm! ;)
20 - counted loop support
21 - make integer + FP mul/div more clever (we have fixed pseudocode atm)
22 - track and use comparison complements
25 - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
26 don't need to worry about this.
27 - i have instruction scheduling/bundling pseudocode, that really works
28 (has been tested, albeit at the perl-script level).
29 so, before you go write your own, send me an email!
31 KNOWN DEFECTS AT THE CURRENT TIME:
32 - C++ vtables contain naked function pointers, not function descriptors,
33 which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
35 - alloca doesn't work (indeed, stack frame layout is bogus)
36 - no support for big-endian environments
37 - (not really the backend, but...) the CFE has some issues on IA64.
38 these will probably be fixed soon.
41 - Chris Lattner (x100)
42 - Other LLVM developers ("hey, that looks familiar")
45 - You can email me at duraid@octopus.com.au. If you find a small bug,
46 just email me. If you find a big bug, please file a bug report
47 in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all