Merge branch 'master' into msp430
[llvm/msp430.git] / lib / Target / Mips / MipsSubtarget.cpp
blob48f58a55aadafbdbbbd0d8bed77c805aab4d0ea0
1 //===- MipsSubtarget.cpp - Mips Subtarget Information -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the Mips specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "MipsSubtarget.h"
15 #include "Mips.h"
16 #include "MipsGenSubtarget.inc"
17 #include "llvm/Module.h"
18 #include "llvm/Support/CommandLine.h"
19 using namespace llvm;
21 static cl::opt<bool>
22 NotABICall("disable-mips-abicall", cl::Hidden,
23 cl::desc("Disable code for SVR4-style dynamic objects"));
24 static cl::opt<bool>
25 AbsoluteCall("enable-mips-absolute-call", cl::Hidden,
26 cl::desc("Enable absolute call within abicall"));
27 static cl::opt<unsigned>
28 SSThreshold("mips-ssection-threshold", cl::Hidden,
29 cl::desc("Small data and bss section threshold size (default=8)"),
30 cl::init(8));
32 MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M,
33 const std::string &FS, bool little) :
34 MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
35 IsFP64bit(false), IsGP64bit(false), HasVFPU(false), HasABICall(true),
36 HasAbsoluteCall(false), IsLinux(true), HasSEInReg(false), HasCondMov(false),
37 HasMulDivAdd(false), HasMinMax(false), HasSwap(false), HasBitCount(false)
39 std::string CPU = "mips1";
41 // Parse features string.
42 ParseSubtargetFeatures(FS, CPU);
43 const std::string& TT = M.getTargetTriple();
45 // Small section size threshold
46 SSectionThreshold = SSThreshold;
48 // Is the target system Linux ?
49 if (TT.find("linux") == std::string::npos)
50 IsLinux = false;
52 // When only the target triple is specified and is
53 // a allegrex target, set the features. We also match
54 // big and little endian allegrex cores (dont really
55 // know if a big one exists)
56 if (TT.find("mipsallegrex") != std::string::npos ||
57 TT.find("psp") != std::string::npos) {
58 MipsABI = EABI;
59 IsSingleFloat = true;
60 MipsArchVersion = Mips2;
61 HasVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
62 HasSEInReg = true;
63 HasBitCount = true;
64 HasSwap = true;
65 HasCondMov = true;
68 // Abicall is the default for O32 ABI, but is disabled within EABI and in
69 // static code.
70 if (NotABICall || isABI_EABI() || (TM.getRelocationModel() == Reloc::Static))
71 HasABICall = false;
73 // TODO: disable when handling 64 bit symbols in the future.
74 if (HasABICall && AbsoluteCall)
75 HasAbsoluteCall = true;