lib/Target/PIC16/PIC16InstrInfo.cpp

   1 //===- PIC16InstrInfo.cpp - PIC16 Instruction Information -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the PIC16 implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PIC16.h"
  15 #include "PIC16InstrInfo.h"
  16 #include "PIC16TargetMachine.h"
  17 #include "PIC16GenInstrInfo.inc"
  18 #include "llvm/Function.h"
  19 #include "llvm/ADT/STLExtras.h"
  20 #include "llvm/CodeGen/MachineFunction.h"
  21 #include "llvm/CodeGen/MachineInstrBuilder.h"
  22 #include "llvm/CodeGen/MachineRegisterInfo.h"
  23 #include <cstdio>
  24
  25
  26 using namespace llvm;
  27
  28 // FIXME: Add the subtarget support on this constructor.
  29 PIC16InstrInfo::PIC16InstrInfo(PIC16TargetMachine &tm)
  30   : TargetInstrInfoImpl(PIC16Insts, array_lengthof(PIC16Insts)),
  31     TM(tm),
  32     RegInfo(*this, *TM.getSubtargetImpl()) {}
  33
  34
  35 /// isStoreToStackSlot - If the specified machine instruction is a direct
  36 /// store to a stack slot, return the virtual or physical register number of
  37 /// the source reg along with the FrameIndex of the loaded stack slot.
  38 /// If not, return 0.  This predicate must return 0 if the instruction has
  39 /// any side effects other than storing to the stack slot.
  40 unsigned PIC16InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
  41                                             int &FrameIndex) const {
  42   if (MI->getOpcode() == PIC16::movwf
  43       && MI->getOperand(0).isReg()
  44       && MI->getOperand(1).isSymbol()) {
  45     FrameIndex = MI->getOperand(1).getIndex();
  46     return MI->getOperand(0).getReg();
  47   }
  48   return 0;
  49 }
  50
  51 /// isLoadFromStackSlot - If the specified machine instruction is a direct
  52 /// load from a stack slot, return the virtual or physical register number of
  53 /// the dest reg along with the FrameIndex of the stack slot.
  54 /// If not, return 0.  This predicate must return 0 if the instruction has
  55 /// any side effects other than storing to the stack slot.
  56 unsigned PIC16InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
  57                                             int &FrameIndex) const {
  58   if (MI->getOpcode() == PIC16::movf
  59       && MI->getOperand(0).isReg()
  60       && MI->getOperand(1).isSymbol()) {
  61     FrameIndex = MI->getOperand(1).getIndex();
  62     return MI->getOperand(0).getReg();
  63   }
  64   return 0;
  65 }
  66
  67
  68 void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
  69                                          MachineBasicBlock::iterator I,
  70                                          unsigned SrcReg, bool isKill, int FI,
  71                                          const TargetRegisterClass *RC) const {
  72   PIC16TargetLowering *PTLI = TM.getTargetLowering();
  73   DebugLoc DL = DebugLoc::getUnknownLoc();
  74   if (I != MBB.end()) DL = I->getDebugLoc();
  75
  76   const Function *Func = MBB.getParent()->getFunction();
  77   const std::string FuncName = Func->getName();
  78
  79   const char *tmpName = createESName(PAN::getTempdataLabel(FuncName));
  80
  81   // On the order of operands here: think "movwf SrcReg, tmp_slot, offset".
  82   if (RC == PIC16::GPRRegisterClass) {
  83     //MachineFunction &MF = *MBB.getParent();
  84     //MachineRegisterInfo &RI = MF.getRegInfo();
  85     BuildMI(MBB, I, DL, get(PIC16::movwf))
  86       .addReg(SrcReg, getKillRegState(isKill))
  87       .addImm(PTLI->GetTmpOffsetForFI(FI, 1))
  88       .addExternalSymbol(tmpName)
  89       .addImm(1); // Emit banksel for it.
  90   }
  91   else if (RC == PIC16::FSR16RegisterClass) {
  92     // This is a 16-bit register and the frameindex given by llvm is of
  93     // size two here. Break this index N into two zero based indexes and
  94     // put one into the map. The second one is always obtained by adding 1
  95     // to the first zero based index. In fact it is going to use 3 slots
  96     // as saving FSRs corrupts W also and hence we need to save/restore W also.
  97
  98     unsigned opcode = (SrcReg == PIC16::FSR0) ? PIC16::save_fsr0
  99                                                  : PIC16::save_fsr1;
 100     BuildMI(MBB, I, DL, get(opcode))
 101       .addReg(SrcReg, getKillRegState(isKill))
 102       .addImm(PTLI->GetTmpOffsetForFI(FI, 3))
 103       .addExternalSymbol(tmpName)
 104       .addImm(1); // Emit banksel for it.
 105   }
 106   else
 107     assert(0 && "Can't store this register to stack slot");
 108 }
 109
 110 void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
 111                                           MachineBasicBlock::iterator I,
 112                                           unsigned DestReg, int FI,
 113                                           const TargetRegisterClass *RC) const {
 114   PIC16TargetLowering *PTLI = TM.getTargetLowering();
 115   DebugLoc DL = DebugLoc::getUnknownLoc();
 116   if (I != MBB.end()) DL = I->getDebugLoc();
 117
 118   const Function *Func = MBB.getParent()->getFunction();
 119   const std::string FuncName = Func->getName();
 120
 121   const char *tmpName = createESName(PAN::getTempdataLabel(FuncName));
 122
 123   // On the order of operands here: think "movf FrameIndex, W".
 124   if (RC == PIC16::GPRRegisterClass) {
 125     //MachineFunction &MF = *MBB.getParent();
 126     //MachineRegisterInfo &RI = MF.getRegInfo();
 127     BuildMI(MBB, I, DL, get(PIC16::movf), DestReg)
 128       .addImm(PTLI->GetTmpOffsetForFI(FI, 1))
 129       .addExternalSymbol(tmpName)
 130       .addImm(1); // Emit banksel for it.
 131   }
 132   else if (RC == PIC16::FSR16RegisterClass) {
 133     // This is a 16-bit register and the frameindex given by llvm is of
 134     // size two here. Break this index N into two zero based indexes and
 135     // put one into the map. The second one is always obtained by adding 1
 136     // to the first zero based index. In fact it is going to use 3 slots
 137     // as saving FSRs corrupts W also and hence we need to save/restore W also.
 138
 139     unsigned opcode = (DestReg == PIC16::FSR0) ? PIC16::restore_fsr0
 140                                                  : PIC16::restore_fsr1;
 141     BuildMI(MBB, I, DL, get(opcode), DestReg)
 142       .addImm(PTLI->GetTmpOffsetForFI(FI, 3))
 143       .addExternalSymbol(tmpName)
 144       .addImm(1); // Emit banksel for it.
 145   }
 146   else
 147     assert(0 && "Can't load this register from stack slot");
 148 }
 149
 150 bool PIC16InstrInfo::copyRegToReg (MachineBasicBlock &MBB,
 151                                    MachineBasicBlock::iterator I,
 152                                    unsigned DestReg, unsigned SrcReg,
 153                                    const TargetRegisterClass *DestRC,
 154                                    const TargetRegisterClass *SrcRC) const {
 155   DebugLoc DL = DebugLoc::getUnknownLoc();
 156   if (I != MBB.end()) DL = I->getDebugLoc();
 157
 158   if (DestRC == PIC16::FSR16RegisterClass) {
 159     BuildMI(MBB, I, DL, get(PIC16::copy_fsr), DestReg).addReg(SrcReg);
 160     return true;
 161   }
 162
 163   if (DestRC == PIC16::GPRRegisterClass) {
 164     BuildMI(MBB, I, DL, get(PIC16::copy_w), DestReg).addReg(SrcReg);
 165     return true;
 166   }
 167
 168   // Not yet supported.
 169   return false;
 170 }
 171
 172 bool PIC16InstrInfo::isMoveInstr(const MachineInstr &MI,
 173                                  unsigned &SrcReg, unsigned &DestReg,
 174                                  unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
 175   SrcSubIdx = DstSubIdx = 0; // No sub-registers.
 176
 177   if (MI.getOpcode() == PIC16::copy_fsr
 178       || MI.getOpcode() == PIC16::copy_w) {
 179     DestReg = MI.getOperand(0).getReg();
 180     SrcReg = MI.getOperand(1).getReg();
 181     return true;
 182   }
 183
 184   return false;
 185 }
 186