lib/Target/X86/X86RegisterInfo.h

   1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the X86 implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef X86REGISTERINFO_H
  15 #define X86REGISTERINFO_H
  16
  17 #include "llvm/Target/TargetRegisterInfo.h"
  18 #include "X86GenRegisterInfo.h.inc"
  19
  20 namespace llvm {
  21   class Type;
  22   class TargetInstrInfo;
  23   class X86TargetMachine;
  24
  25 /// N86 namespace - Native X86 register numbers
  26 ///
  27 namespace N86 {
  28   enum {
  29     EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
  30   };
  31 }
  32
  33 namespace X86 {
  34   /// SubregIndex - The index of various sized subregister classes. Note that
  35   /// these indices must be kept in sync with the class indices in the
  36   /// X86RegisterInfo.td file.
  37   enum SubregIndex {
  38     SUBREG_8BIT = 1, SUBREG_8BIT_HI = 2, SUBREG_16BIT = 3, SUBREG_32BIT = 4
  39   };
  40 }
  41
  42 /// DWARFFlavour - Flavour of dwarf regnumbers
  43 ///
  44 namespace DWARFFlavour {
  45   enum {
  46     X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
  47   };
  48 }
  49
  50 class X86RegisterInfo : public X86GenRegisterInfo {
  51 public:
  52   X86TargetMachine &TM;
  53   const TargetInstrInfo &TII;
  54
  55 private:
  56   /// Is64Bit - Is the target 64-bits.
  57   ///
  58   bool Is64Bit;
  59
  60   /// IsWin64 - Is the target on of win64 flavours
  61   ///
  62   bool IsWin64;
  63
  64   /// SlotSize - Stack slot size in bytes.
  65   ///
  66   unsigned SlotSize;
  67
  68   /// StackAlign - Default stack alignment.
  69   ///
  70   unsigned StackAlign;
  71
  72   /// StackPtr - X86 physical register used as stack ptr.
  73   ///
  74   unsigned StackPtr;
  75
  76   /// FramePtr - X86 physical register used as frame ptr.
  77   ///
  78   unsigned FramePtr;
  79
  80 public:
  81   X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
  82
  83   /// getX86RegNum - Returns the native X86 register number for the given LLVM
  84   /// register identifier.
  85   static unsigned getX86RegNum(unsigned RegNo);
  86
  87   unsigned getStackAlignment() const { return StackAlign; }
  88
  89   /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum
  90   /// (created by TableGen) for target dependencies.
  91   int getDwarfRegNum(unsigned RegNum, bool isEH) const;
  92
  93   /// Code Generation virtual methods...
  94   ///
  95
  96   /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
  97   /// values.
  98   const TargetRegisterClass *getPointerRegClass() const;
  99
 100   /// getCrossCopyRegClass - Returns a legal register class to copy a register
 101   /// in the specified class to or from. Returns NULL if it is possible to copy
 102   /// between a two registers of the specified class.
 103   const TargetRegisterClass *
 104   getCrossCopyRegClass(const TargetRegisterClass *RC) const;
 105
 106   /// getCalleeSavedRegs - Return a null-terminated list of all of the
 107   /// callee-save registers on this target.
 108   const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
 109
 110   /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
 111   /// register classes to spill each callee-saved register with.  The order and
 112   /// length of this list match the getCalleeSavedRegs() list.
 113   const TargetRegisterClass* const*
 114   getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
 115
 116   /// getReservedRegs - Returns a bitset indexed by physical register number
 117   /// indicating if a register is a special register that has particular uses and
 118   /// should be considered unavailable at all times, e.g. SP, RA. This is used by
 119   /// register scavenger to determine what registers are free.
 120   BitVector getReservedRegs(const MachineFunction &MF) const;
 121
 122   bool hasFP(const MachineFunction &MF) const;
 123
 124   bool needsStackRealignment(const MachineFunction &MF) const;
 125
 126   bool hasReservedCallFrame(MachineFunction &MF) const;
 127
 128   void eliminateCallFramePseudoInstr(MachineFunction &MF,
 129                                      MachineBasicBlock &MBB,
 130                                      MachineBasicBlock::iterator MI) const;
 131
 132   void eliminateFrameIndex(MachineBasicBlock::iterator MI,
 133                            int SPAdj, RegScavenger *RS = NULL) const;
 134
 135   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
 136   void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
 137                                             RegScavenger *RS = NULL) const;
 138
 139   void emitPrologue(MachineFunction &MF) const;
 140   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
 141
 142   void emitFrameMoves(MachineFunction &MF,
 143                       unsigned FrameLabelId, unsigned ReadyLabelId) const;
 144
 145   // Debug information queries.
 146   unsigned getRARegister() const;
 147   unsigned getFrameRegister(MachineFunction &MF) const;
 148   int getFrameIndexOffset(MachineFunction &MF, int FI) const;
 149   void getInitialFrameState(std::vector<MachineMove> &Moves) const;
 150
 151   // Exception handling queries.
 152   unsigned getEHExceptionRegister() const;
 153   unsigned getEHHandlerRegister() const;
 154 };
 155
 156 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
 157 // register of a specific X86 register.
 158 // e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
 159 unsigned getX86SubSuperRegister(unsigned, MVT, bool High=false);
 160
 161 } // End llvm namespace
 162
 163 #endif