lib/Target/X86/X86TargetMachine.cpp

   1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines the X86 specific subclass of TargetMachine.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "X86TargetAsmInfo.h"
  15 #include "X86TargetMachine.h"
  16 #include "X86.h"
  17 #include "llvm/Module.h"
  18 #include "llvm/PassManager.h"
  19 #include "llvm/CodeGen/MachineFunction.h"
  20 #include "llvm/CodeGen/Passes.h"
  21 #include "llvm/Support/raw_ostream.h"
  22 #include "llvm/Target/TargetOptions.h"
  23 #include "llvm/Target/TargetMachineRegistry.h"
  24 using namespace llvm;
  25
  26 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
  27 /// in a library unless there are references into the library.  In particular,
  28 /// it seems that it is not possible to get things to work on Win32 without
  29 /// this.  Though it is unused, do not remove it.
  30 extern "C" int X86TargetMachineModule;
  31 int X86TargetMachineModule = 0;
  32
  33 // Register the target.
  34 static RegisterTarget<X86_32TargetMachine>
  35 X("x86",    "32-bit X86: Pentium-Pro and above");
  36 static RegisterTarget<X86_64TargetMachine>
  37 Y("x86-64", "64-bit X86: EM64T and AMD64");
  38
  39 // No assembler printer by default
  40 X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
  41
  42 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
  43   if (Subtarget.isFlavorIntel())
  44     return new X86WinTargetAsmInfo(*this);
  45   else
  46     switch (Subtarget.TargetType) {
  47      case X86Subtarget::isDarwin:
  48       return new X86DarwinTargetAsmInfo(*this);
  49      case X86Subtarget::isELF:
  50       return new X86ELFTargetAsmInfo(*this);
  51      case X86Subtarget::isMingw:
  52      case X86Subtarget::isCygwin:
  53       return new X86COFFTargetAsmInfo(*this);
  54      case X86Subtarget::isWindows:
  55       return new X86WinTargetAsmInfo(*this);
  56      default:
  57       return new X86GenericTargetAsmInfo(*this);
  58     }
  59 }
  60
  61 unsigned X86_32TargetMachine::getJITMatchQuality() {
  62 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
  63   return 10;
  64 #endif
  65   return 0;
  66 }
  67
  68 unsigned X86_64TargetMachine::getJITMatchQuality() {
  69 #if defined(__x86_64__) || defined(_M_AMD64)
  70   return 10;
  71 #endif
  72   return 0;
  73 }
  74
  75 unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
  76   // We strongly match "i[3-9]86-*".
  77   std::string TT = M.getTargetTriple();
  78   if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
  79       TT[4] == '-' && TT[1] - '3' < 6)
  80     return 20;
  81   // If the target triple is something non-X86, we don't match.
  82   if (!TT.empty()) return 0;
  83
  84   if (M.getEndianness()  == Module::LittleEndian &&
  85       M.getPointerSize() == Module::Pointer32)
  86     return 10;                                   // Weak match
  87   else if (M.getEndianness() != Module::AnyEndianness ||
  88            M.getPointerSize() != Module::AnyPointerSize)
  89     return 0;                                    // Match for some other target
  90
  91   return getJITMatchQuality()/2;
  92 }
  93
  94 unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
  95   // We strongly match "x86_64-*".
  96   std::string TT = M.getTargetTriple();
  97   if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
  98       TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
  99     return 20;
 100
 101   // We strongly match "amd64-*".
 102   if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' &&
 103       TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
 104     return 20;
 105
 106   // If the target triple is something non-X86-64, we don't match.
 107   if (!TT.empty()) return 0;
 108
 109   if (M.getEndianness()  == Module::LittleEndian &&
 110       M.getPointerSize() == Module::Pointer64)
 111     return 10;                                   // Weak match
 112   else if (M.getEndianness() != Module::AnyEndianness ||
 113            M.getPointerSize() != Module::AnyPointerSize)
 114     return 0;                                    // Match for some other target
 115
 116   return getJITMatchQuality()/2;
 117 }
 118
 119 X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
 120   : X86TargetMachine(M, FS, false) {
 121 }
 122
 123
 124 X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
 125   : X86TargetMachine(M, FS, true) {
 126 }
 127
 128 /// X86TargetMachine ctor - Create an ILP32 architecture model
 129 ///
 130 X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
 131                                    bool is64Bit)
 132   : Subtarget(M, FS, is64Bit),
 133     DataLayout(Subtarget.getDataLayout()),
 134     FrameInfo(TargetFrameInfo::StackGrowsDown,
 135               Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
 136     InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
 137   DefRelocModel = getRelocationModel();
 138   // FIXME: Correctly select PIC model for Win64 stuff
 139   if (getRelocationModel() == Reloc::Default) {
 140     if (Subtarget.isTargetDarwin() ||
 141         (Subtarget.isTargetCygMing() && !Subtarget.isTargetWin64()))
 142       setRelocationModel(Reloc::DynamicNoPIC);
 143     else
 144       setRelocationModel(Reloc::Static);
 145   }
 146
 147   // ELF doesn't have a distinct dynamic-no-PIC model. Dynamic-no-PIC
 148   // is defined as a model for code which may be used in static or
 149   // dynamic executables but not necessarily a shared library. On ELF
 150   // implement this by using the Static model.
 151   if (Subtarget.isTargetELF() &&
 152       getRelocationModel() == Reloc::DynamicNoPIC)
 153     setRelocationModel(Reloc::Static);
 154
 155   if (Subtarget.is64Bit()) {
 156     // No DynamicNoPIC support under X86-64.
 157     if (getRelocationModel() == Reloc::DynamicNoPIC)
 158       setRelocationModel(Reloc::PIC_);
 159     // Default X86-64 code model is small.
 160     if (getCodeModel() == CodeModel::Default)
 161       setCodeModel(CodeModel::Small);
 162   }
 163
 164   if (Subtarget.isTargetCygMing())
 165     Subtarget.setPICStyle(PICStyles::WinPIC);
 166   else if (Subtarget.isTargetDarwin()) {
 167     if (Subtarget.is64Bit())
 168       Subtarget.setPICStyle(PICStyles::RIPRel);
 169     else
 170       Subtarget.setPICStyle(PICStyles::Stub);
 171   } else if (Subtarget.isTargetELF()) {
 172     if (Subtarget.is64Bit())
 173       Subtarget.setPICStyle(PICStyles::RIPRel);
 174     else
 175       Subtarget.setPICStyle(PICStyles::GOT);
 176   }
 177 }
 178
 179 //===----------------------------------------------------------------------===//
 180 // Pass Pipeline Configuration
 181 //===----------------------------------------------------------------------===//
 182
 183 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
 184                                        CodeGenOpt::Level OptLevel) {
 185   // Install an instruction selector.
 186   PM.add(createX86ISelDag(*this, OptLevel));
 187
 188   // If we're using Fast-ISel, clean up the mess.
 189   if (EnableFastISel)
 190     PM.add(createDeadMachineInstructionElimPass());
 191
 192   // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
 193   PM.add(createX87FPRegKillInserterPass());
 194
 195   return false;
 196 }
 197
 198 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
 199                                       CodeGenOpt::Level OptLevel) {
 200   // Calculate and set max stack object alignment early, so we can decide
 201   // whether we will need stack realignment (and thus FP).
 202   PM.add(createX86MaxStackAlignmentCalculatorPass());
 203   return false;  // -print-machineinstr shouldn't print after this.
 204 }
 205
 206 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
 207                                        CodeGenOpt::Level OptLevel) {
 208   PM.add(createX86FloatingPointStackifierPass());
 209   return true;  // -print-machineinstr should print after this.
 210 }
 211
 212 bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
 213                                           CodeGenOpt::Level OptLevel,
 214                                           bool Verbose,
 215                                           raw_ostream &Out) {
 216   assert(AsmPrinterCtor && "AsmPrinter was not linked in");
 217   if (AsmPrinterCtor)
 218     PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
 219   return false;
 220 }
 221
 222 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
 223                                       CodeGenOpt::Level OptLevel,
 224                                       bool DumpAsm, MachineCodeEmitter &MCE) {
 225   // FIXME: Move this to TargetJITInfo!
 226   // On Darwin, do not override 64-bit setting made in X86TargetMachine().
 227   if (DefRelocModel == Reloc::Default &&
 228         (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
 229     setRelocationModel(Reloc::Static);
 230
 231   // 64-bit JIT places everything in the same buffer except external functions.
 232   // On Darwin, use small code model but hack the call instruction for
 233   // externals.  Elsewhere, do not assume globals are in the lower 4G.
 234   if (Subtarget.is64Bit()) {
 235     if (Subtarget.isTargetDarwin())
 236       setCodeModel(CodeModel::Small);
 237     else
 238       setCodeModel(CodeModel::Large);
 239   }
 240
 241   PM.add(createX86CodeEmitterPass(*this, MCE));
 242   if (DumpAsm) {
 243     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
 244     if (AsmPrinterCtor)
 245       PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
 246   }
 247
 248   return false;
 249 }
 250
 251 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 252                                             CodeGenOpt::Level OptLevel,
 253                                             bool DumpAsm,
 254                                             MachineCodeEmitter &MCE) {
 255   PM.add(createX86CodeEmitterPass(*this, MCE));
 256   if (DumpAsm) {
 257     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
 258     if (AsmPrinterCtor)
 259       PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
 260   }
 261
 262   return false;
 263 }
 264
 265 /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
 266 /// RIP-relative on this machine, taking into consideration the relocation
 267 /// model and subtarget. RIP-relative addresses cannot have a separate
 268 /// base or index register.
 269 bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
 270   return getRelocationModel() != Reloc::Static &&
 271          Subtarget.isPICStyleRIPRel();
 272 }