lib/Target/MSP430/MSP430RegisterInfo.cpp

   1 //===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the MSP430 implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "msp430-reg-info"
  15
  16 #include "MSP430.h"
  17 #include "MSP430RegisterInfo.h"
  18 #include "llvm/CodeGen/MachineFrameInfo.h"
  19 #include "llvm/CodeGen/MachineFunction.h"
  20 #include "llvm/Target/TargetMachine.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/ADT/BitVector.h"
  23
  24 using namespace llvm;
  25
  26 // FIXME: Provide proper call frame setup / destroy opcodes.
  27 MSP430RegisterInfo::MSP430RegisterInfo(const TargetInstrInfo &tii)
  28   : MSP430GenRegisterInfo(MSP430::NOP, MSP430::NOP),
  29     TII(tii) {}
  30
  31 const unsigned*
  32 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
  33   static const unsigned CalleeSavedRegs[] = {
  34     MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
  35     MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
  36     0
  37   };
  38
  39   return CalleeSavedRegs;
  40 }
  41
  42 const TargetRegisterClass* const*
  43 MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
  44   static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
  45     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  46     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  47     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  48     &MSP430::GR16RegClass, &MSP430::GR16RegClass,
  49     0
  50   };
  51
  52   return CalleeSavedRegClasses;
  53 }
  54
  55 BitVector
  56 MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  57   BitVector Reserved(getNumRegs());
  58
  59   // Mark 4 special registers as reserved.
  60   Reserved.set(MSP430::PCW);
  61   Reserved.set(MSP430::SPW);
  62   Reserved.set(MSP430::SRW);
  63   Reserved.set(MSP430::CGW);
  64
  65   // Mark frame pointer as reserved if needed.
  66   if (hasFP(MF))
  67     Reserved.set(MSP430::FPW);
  68
  69   return Reserved;
  70 }
  71
  72 bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
  73   return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
  74 }
  75
  76 void
  77 MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
  78                                         int SPAdj, RegScavenger *RS) const {
  79   assert(0 && "Not implemented yet!");
  80 }
  81
  82 void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const {
  83   // Nothing here yet
  84 }
  85
  86 void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
  87                                       MachineBasicBlock &MBB) const {
  88   // Nothing here yet
  89 }
  90
  91 unsigned MSP430RegisterInfo::getRARegister() const {
  92   assert(0 && "Not implemented yet!");
  93 }
  94
  95 unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const {
  96   assert(0 && "Not implemented yet!");
  97 }
  98
  99 int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
 100   assert(0 && "Not implemented yet!");
 101 }
 102
 103 #include "MSP430GenRegisterInfo.inc"