Add 8-bit regclass and pattern for sext_inreg
[llvm/msp430.git] / lib / Target / PowerPC / PPCRegisterInfo.h
blob9506b651c5b382a98924c821120bd857d37eb44d
1 //===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the PowerPC implementation of the TargetRegisterInfo
11 // class.
13 //===----------------------------------------------------------------------===//
15 #ifndef POWERPC32_REGISTERINFO_H
16 #define POWERPC32_REGISTERINFO_H
18 #include "PPC.h"
19 #include "PPCGenRegisterInfo.h.inc"
20 #include <map>
22 namespace llvm {
23 class PPCSubtarget;
24 class TargetInstrInfo;
25 class Type;
27 class PPCRegisterInfo : public PPCGenRegisterInfo {
28 std::map<unsigned, unsigned> ImmToIdxMap;
29 const PPCSubtarget &Subtarget;
30 const TargetInstrInfo &TII;
31 public:
32 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
34 /// getRegisterNumbering - Given the enum value for some register, e.g.
35 /// PPC::F14, return the number that it corresponds to (e.g. 14).
36 static unsigned getRegisterNumbering(unsigned RegEnum);
38 /// getPointerRegClass - Return the register class to use to hold pointers.
39 /// This is used for addressing modes.
40 virtual const TargetRegisterClass *getPointerRegClass() const;
42 /// Code Generation virtual methods...
43 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
45 const TargetRegisterClass* const*
46 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
48 BitVector getReservedRegs(const MachineFunction &MF) const;
50 /// targetHandlesStackFrameRounding - Returns true if the target is
51 /// responsible for rounding up the stack frame (probably at emitPrologue
52 /// time).
53 bool targetHandlesStackFrameRounding() const { return true; }
55 /// requiresRegisterScavenging - We require a register scavenger.
56 /// FIXME (64-bit): Should be inlined.
57 bool requiresRegisterScavenging(const MachineFunction &MF) const;
59 bool hasFP(const MachineFunction &MF) const;
61 void eliminateCallFramePseudoInstr(MachineFunction &MF,
62 MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator I) const;
65 void lowerDynamicAlloc(MachineBasicBlock::iterator II,
66 int SPAdj, RegScavenger *RS) const;
67 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
68 int SPAdj, RegScavenger *RS) const;
69 void eliminateFrameIndex(MachineBasicBlock::iterator II,
70 int SPAdj, RegScavenger *RS = NULL) const;
72 /// determineFrameLayout - Determine the size of the frame and maximum call
73 /// frame size.
74 void determineFrameLayout(MachineFunction &MF) const;
76 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
77 RegScavenger *RS = NULL) const;
78 void emitPrologue(MachineFunction &MF) const;
79 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
81 // Debug information queries.
82 unsigned getRARegister() const;
83 unsigned getFrameRegister(MachineFunction &MF) const;
84 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
86 // Exception handling queries.
87 unsigned getEHExceptionRegister() const;
88 unsigned getEHHandlerRegister() const;
90 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
93 } // end namespace llvm
95 #endif