Add 8-bit regclass and pattern for sext_inreg
[llvm/msp430.git] / lib / Target / XCore / CMakeLists.txt
bloba7aba14a7a14c5e29d8cba225864d9599525be7c
1 set(LLVM_TARGET_DEFINITIONS XCore.td)
3 tablegen(XCoreGenRegisterInfo.h.inc -gen-register-desc-header)
4 tablegen(XCoreGenRegisterNames.inc -gen-register-enums)
5 tablegen(XCoreGenRegisterInfo.inc -gen-register-desc)
6 tablegen(XCoreGenInstrNames.inc -gen-instr-enums)
7 tablegen(XCoreGenInstrInfo.inc -gen-instr-desc)
8 tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
9 tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
10 tablegen(XCoreGenCallingConv.inc -gen-callingconv)
11 tablegen(XCoreGenSubtarget.inc -gen-subtarget)
13 add_llvm_target(XCore
14   XCoreAsmPrinter.cpp
15   XCoreFrameInfo.cpp
16   XCoreInstrInfo.cpp
17   XCoreISelDAGToDAG.cpp
18   XCoreISelLowering.cpp
19   XCoreRegisterInfo.cpp
20   XCoreSubtarget.cpp
21   XCoreTargetAsmInfo.cpp
22   XCoreTargetMachine.cpp
23   )