lib/CodeGen/StackSlotColoring.cpp

   1 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the stack slot coloring pass.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "stackcoloring"
  15 #include "VirtRegMap.h"
  16 #include "llvm/CodeGen/Passes.h"
  17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  18 #include "llvm/CodeGen/LiveStackAnalysis.h"
  19 #include "llvm/CodeGen/MachineFrameInfo.h"
  20 #include "llvm/CodeGen/MachineLoopInfo.h"
  21 #include "llvm/CodeGen/MachineRegisterInfo.h"
  22 #include "llvm/CodeGen/PseudoSourceValue.h"
  23 #include "llvm/Support/CommandLine.h"
  24 #include "llvm/Support/Compiler.h"
  25 #include "llvm/Support/Debug.h"
  26 #include "llvm/Target/TargetInstrInfo.h"
  27 #include "llvm/Target/TargetMachine.h"
  28 #include "llvm/ADT/BitVector.h"
  29 #include "llvm/ADT/SmallSet.h"
  30 #include "llvm/ADT/SmallVector.h"
  31 #include "llvm/ADT/Statistic.h"
  32 #include <vector>
  33 using namespace llvm;
  34
  35 static cl::opt<bool>
  36 DisableSharing("no-stack-slot-sharing",
  37              cl::init(false), cl::Hidden,
  38              cl::desc("Suppress slot sharing during stack coloring"));
  39
  40 static cl::opt<bool>
  41 ColorWithRegsOpt("color-ss-with-regs",
  42                  cl::init(false), cl::Hidden,
  43                  cl::desc("Color stack slots with free registers"));
  44
  45
  46 static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
  47
  48 STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
  49 STATISTIC(NumRegRepl,    "Number of stack slot refs replaced with reg refs");
  50 STATISTIC(NumLoadElim,   "Number of loads eliminated");
  51 STATISTIC(NumStoreElim,  "Number of stores eliminated");
  52 STATISTIC(NumDead,       "Number of trivially dead stack accesses eliminated");
  53
  54 namespace {
  55   class VISIBILITY_HIDDEN StackSlotColoring : public MachineFunctionPass {
  56     bool ColorWithRegs;
  57     LiveStacks* LS;
  58     VirtRegMap* VRM;
  59     MachineFrameInfo *MFI;
  60     MachineRegisterInfo *MRI;
  61     const TargetInstrInfo  *TII;
  62     const TargetRegisterInfo *TRI;
  63     const MachineLoopInfo *loopInfo;
  64
  65     // SSIntervals - Spill slot intervals.
  66     std::vector<LiveInterval*> SSIntervals;
  67
  68     // SSRefs - Keep a list of frame index references for each spill slot.
  69     SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
  70
  71     // OrigAlignments - Alignments of stack objects before coloring.
  72     SmallVector<unsigned, 16> OrigAlignments;
  73
  74     // OrigSizes - Sizess of stack objects before coloring.
  75     SmallVector<unsigned, 16> OrigSizes;
  76
  77     // AllColors - If index is set, it's a spill slot, i.e. color.
  78     // FIXME: This assumes PEI locate spill slot with smaller indices
  79     // closest to stack pointer / frame pointer. Therefore, smaller
  80     // index == better color.
  81     BitVector AllColors;
  82
  83     // NextColor - Next "color" that's not yet used.
  84     int NextColor;
  85
  86     // UsedColors - "Colors" that have been assigned.
  87     BitVector UsedColors;
  88
  89     // Assignments - Color to intervals mapping.
  90     SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
  91
  92   public:
  93     static char ID; // Pass identification
  94     StackSlotColoring() :
  95       MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
  96     StackSlotColoring(bool RegColor) :
  97       MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
  98
  99     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
 100       AU.addRequired<LiveStacks>();
 101       AU.addRequired<VirtRegMap>();
 102       AU.addPreserved<VirtRegMap>();
 103       AU.addRequired<MachineLoopInfo>();
 104       AU.addPreserved<MachineLoopInfo>();
 105       AU.addPreservedID(MachineDominatorsID);
 106       MachineFunctionPass::getAnalysisUsage(AU);
 107     }
 108
 109     virtual bool runOnMachineFunction(MachineFunction &MF);
 110     virtual const char* getPassName() const {
 111       return "Stack Slot Coloring";
 112     }
 113
 114   private:
 115     void InitializeSlots();
 116     void ScanForSpillSlotRefs(MachineFunction &MF);
 117     bool OverlapWithAssignments(LiveInterval *li, int Color) const;
 118     int ColorSlot(LiveInterval *li);
 119     bool ColorSlots(MachineFunction &MF);
 120     bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
 121                                 SmallVector<SmallVector<int, 4>, 16> &RevMap,
 122                                 BitVector &SlotIsReg);
 123     void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
 124                             MachineFunction &MF);
 125     bool PropagateBackward(MachineBasicBlock::iterator MII,
 126                            MachineBasicBlock *MBB,
 127                            unsigned OldReg, unsigned NewReg);
 128     bool PropagateForward(MachineBasicBlock::iterator MII,
 129                           MachineBasicBlock *MBB,
 130                           unsigned OldReg, unsigned NewReg);
 131     void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
 132                                     unsigned Reg, const TargetRegisterClass *RC,
 133                                     SmallSet<unsigned, 4> &Defs,
 134                                     MachineFunction &MF);
 135     bool AllMemRefsCanBeUnfolded(int SS);
 136     bool RemoveDeadStores(MachineBasicBlock* MBB);
 137   };
 138 } // end anonymous namespace
 139
 140 char StackSlotColoring::ID = 0;
 141
 142 static RegisterPass<StackSlotColoring>
 143 X("stack-slot-coloring", "Stack Slot Coloring");
 144
 145 FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
 146   return new StackSlotColoring(RegColor);
 147 }
 148
 149 namespace {
 150   // IntervalSorter - Comparison predicate that sort live intervals by
 151   // their weight.
 152   struct IntervalSorter {
 153     bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
 154       return LHS->weight > RHS->weight;
 155     }
 156   };
 157 }
 158
 159 /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
 160 /// references and update spill slot weights.
 161 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
 162   SSRefs.resize(MFI->getObjectIndexEnd());
 163
 164   // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
 165   for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
 166        MBBI != E; ++MBBI) {
 167     MachineBasicBlock *MBB = &*MBBI;
 168     unsigned loopDepth = loopInfo->getLoopDepth(MBB);
 169     for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
 170          MII != EE; ++MII) {
 171       MachineInstr *MI = &*MII;
 172       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
 173         MachineOperand &MO = MI->getOperand(i);
 174         if (!MO.isFI())
 175           continue;
 176         int FI = MO.getIndex();
 177         if (FI < 0)
 178           continue;
 179         if (!LS->hasInterval(FI))
 180           continue;
 181         LiveInterval &li = LS->getInterval(FI);
 182         li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
 183         SSRefs[FI].push_back(MI);
 184       }
 185     }
 186   }
 187 }
 188
 189 /// InitializeSlots - Process all spill stack slot liveintervals and add them
 190 /// to a sorted (by weight) list.
 191 void StackSlotColoring::InitializeSlots() {
 192   int LastFI = MFI->getObjectIndexEnd();
 193   OrigAlignments.resize(LastFI);
 194   OrigSizes.resize(LastFI);
 195   AllColors.resize(LastFI);
 196   UsedColors.resize(LastFI);
 197   Assignments.resize(LastFI);
 198
 199   // Gather all spill slots into a list.
 200   DOUT << "Spill slot intervals:\n";
 201   for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
 202     LiveInterval &li = i->second;
 203     DEBUG(li.dump());
 204     int FI = li.getStackSlotIndex();
 205     if (MFI->isDeadObjectIndex(FI))
 206       continue;
 207     SSIntervals.push_back(&li);
 208     OrigAlignments[FI] = MFI->getObjectAlignment(FI);
 209     OrigSizes[FI]      = MFI->getObjectSize(FI);
 210     AllColors.set(FI);
 211   }
 212   DOUT << '\n';
 213
 214   // Sort them by weight.
 215   std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
 216
 217   // Get first "color".
 218   NextColor = AllColors.find_first();
 219 }
 220
 221 /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
 222 /// LiveIntervals that have already been assigned to the specified color.
 223 bool
 224 StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
 225   const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
 226   for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
 227     LiveInterval *OtherLI = OtherLIs[i];
 228     if (OtherLI->overlaps(*li))
 229       return true;
 230   }
 231   return false;
 232 }
 233
 234 /// ColorSlotsWithFreeRegs - If there are any free registers available, try
 235 /// replacing spill slots references with registers instead.
 236 bool
 237 StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
 238                                    SmallVector<SmallVector<int, 4>, 16> &RevMap,
 239                                    BitVector &SlotIsReg) {
 240   if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
 241     return false;
 242
 243   bool Changed = false;
 244   DOUT << "Assigning unused registers to spill slots:\n";
 245   for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
 246     LiveInterval *li = SSIntervals[i];
 247     int SS = li->getStackSlotIndex();
 248     if (!UsedColors[SS] || li->weight < 20)
 249       // If the weight is < 20, i.e. two references in a loop with depth 1,
 250       // don't bother with it.
 251       continue;
 252
 253     // These slots allow to share the same registers.
 254     bool AllColored = true;
 255     SmallVector<unsigned, 4> ColoredRegs;
 256     for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
 257       int RSS = RevMap[SS][j];
 258       const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
 259       // If it's not colored to another stack slot, try coloring it
 260       // to a "free" register.
 261       if (!RC) {
 262         AllColored = false;
 263         continue;
 264       }
 265       unsigned Reg = VRM->getFirstUnusedRegister(RC);
 266       if (!Reg) {
 267         AllColored = false;
 268         continue;
 269       }
 270       if (!AllMemRefsCanBeUnfolded(RSS)) {
 271         AllColored = false;
 272         continue;
 273       } else {
 274         DOUT << "Assigning fi#" << RSS << " to " << TRI->getName(Reg) << '\n';
 275         ColoredRegs.push_back(Reg);
 276         SlotMapping[RSS] = Reg;
 277         SlotIsReg.set(RSS);
 278         Changed = true;
 279       }
 280     }
 281
 282     // Register and its sub-registers are no longer free.
 283     while (!ColoredRegs.empty()) {
 284       unsigned Reg = ColoredRegs.back();
 285       ColoredRegs.pop_back();
 286       VRM->setRegisterUsed(Reg);
 287       // If reg is a callee-saved register, it will have to be spilled in
 288       // the prologue.
 289       MRI->setPhysRegUsed(Reg);
 290       for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
 291         VRM->setRegisterUsed(*AS);
 292         MRI->setPhysRegUsed(*AS);
 293       }
 294     }
 295     // This spill slot is dead after the rewrites
 296     if (AllColored) {
 297       MFI->RemoveStackObject(SS);
 298       ++NumEliminated;
 299     }
 300   }
 301   DOUT << '\n';
 302
 303   return Changed;
 304 }
 305
 306 /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
 307 ///
 308 int StackSlotColoring::ColorSlot(LiveInterval *li) {
 309   int Color = -1;
 310   bool Share = false;
 311   if (!DisableSharing) {
 312     // Check if it's possible to reuse any of the used colors.
 313     Color = UsedColors.find_first();
 314     while (Color != -1) {
 315       if (!OverlapWithAssignments(li, Color)) {
 316         Share = true;
 317         ++NumEliminated;
 318         break;
 319       }
 320       Color = UsedColors.find_next(Color);
 321     }
 322   }
 323
 324   // Assign it to the first available color (assumed to be the best) if it's
 325   // not possible to share a used color with other objects.
 326   if (!Share) {
 327     assert(NextColor != -1 && "No more spill slots?");
 328     Color = NextColor;
 329     UsedColors.set(Color);
 330     NextColor = AllColors.find_next(NextColor);
 331   }
 332
 333   // Record the assignment.
 334   Assignments[Color].push_back(li);
 335   int FI = li->getStackSlotIndex();
 336   DOUT << "Assigning fi#" << FI << " to fi#" << Color << "\n";
 337
 338   // Change size and alignment of the allocated slot. If there are multiple
 339   // objects sharing the same slot, then make sure the size and alignment
 340   // are large enough for all.
 341   unsigned Align = OrigAlignments[FI];
 342   if (!Share || Align > MFI->getObjectAlignment(Color))
 343     MFI->setObjectAlignment(Color, Align);
 344   int64_t Size = OrigSizes[FI];
 345   if (!Share || Size > MFI->getObjectSize(Color))
 346     MFI->setObjectSize(Color, Size);
 347   return Color;
 348 }
 349
 350 /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
 351 /// operands in the function.
 352 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
 353   unsigned NumObjs = MFI->getObjectIndexEnd();
 354   SmallVector<int, 16> SlotMapping(NumObjs, -1);
 355   SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
 356   SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
 357   BitVector SlotIsReg(NumObjs);
 358   BitVector UsedColors(NumObjs);
 359
 360   DOUT << "Color spill slot intervals:\n";
 361   bool Changed = false;
 362   for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
 363     LiveInterval *li = SSIntervals[i];
 364     int SS = li->getStackSlotIndex();
 365     int NewSS = ColorSlot(li);
 366     assert(NewSS >= 0 && "Stack coloring failed?");
 367     SlotMapping[SS] = NewSS;
 368     RevMap[NewSS].push_back(SS);
 369     SlotWeights[NewSS] += li->weight;
 370     UsedColors.set(NewSS);
 371     Changed |= (SS != NewSS);
 372   }
 373
 374   DOUT << "\nSpill slots after coloring:\n";
 375   for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
 376     LiveInterval *li = SSIntervals[i];
 377     int SS = li->getStackSlotIndex();
 378     li->weight = SlotWeights[SS];
 379   }
 380   // Sort them by new weight.
 381   std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
 382
 383 #ifndef NDEBUG
 384   for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
 385     DEBUG(SSIntervals[i]->dump());
 386   DOUT << '\n';
 387 #endif
 388
 389   // Can we "color" a stack slot with a unused register?
 390   Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
 391
 392   if (!Changed)
 393     return false;
 394
 395   // Rewrite all MO_FrameIndex operands.
 396   SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
 397   for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
 398     bool isReg = SlotIsReg[SS];
 399     int NewFI = SlotMapping[SS];
 400     if (NewFI == -1 || (NewFI == (int)SS && !isReg))
 401       continue;
 402
 403     const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
 404     SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
 405     for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
 406       if (!isReg)
 407         RewriteInstruction(RefMIs[i], SS, NewFI, MF);
 408       else {
 409         // Rewrite to use a register instead.
 410         unsigned MBBId = RefMIs[i]->getParent()->getNumber();
 411         SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
 412         UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
 413       }
 414   }
 415
 416   // Delete unused stack slots.
 417   while (NextColor != -1) {
 418     DOUT << "Removing unused stack object fi#" << NextColor << "\n";
 419     MFI->RemoveStackObject(NextColor);
 420     NextColor = AllColors.find_next(NextColor);
 421   }
 422
 423   return true;
 424 }
 425
 426 /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
 427 /// spill slot index can be unfolded.
 428 bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
 429   SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
 430   for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
 431     MachineInstr *MI = RefMIs[i];
 432     if (TII->isLoadFromStackSlot(MI, SS) ||
 433         TII->isStoreToStackSlot(MI, SS))
 434       // Restore and spill will become copies.
 435       return true;
 436     if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
 437       return false;
 438     for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
 439       MachineOperand &MO = MI->getOperand(j);
 440       if (MO.isFI() && MO.getIndex() != SS)
 441         // If it uses another frameindex, we can, currently* unfold it.
 442         return false;
 443     }
 444   }
 445   return true;
 446 }
 447
 448 /// RewriteInstruction - Rewrite specified instruction by replacing references
 449 /// to old frame index with new one.
 450 void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
 451                                            int NewFI, MachineFunction &MF) {
 452   for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
 453     MachineOperand &MO = MI->getOperand(i);
 454     if (!MO.isFI())
 455       continue;
 456     int FI = MO.getIndex();
 457     if (FI != OldFI)
 458       continue;
 459     MO.setIndex(NewFI);
 460   }
 461
 462   // Update the MachineMemOperand for the new memory location.
 463   // FIXME: We need a better method of managing these too.
 464   SmallVector<MachineMemOperand, 2> MMOs(MI->memoperands_begin(),
 465                                          MI->memoperands_end());
 466   MI->clearMemOperands(MF);
 467   const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
 468   for (unsigned i = 0, ee = MMOs.size(); i != ee; ++i) {
 469     if (MMOs[i].getValue() != OldSV)
 470       MI->addMemOperand(MF, MMOs[i]);
 471     else {
 472       MachineMemOperand MMO(PseudoSourceValue::getFixedStack(NewFI),
 473                             MMOs[i].getFlags(), MMOs[i].getOffset(),
 474                             MMOs[i].getSize(),  MMOs[i].getAlignment());
 475       MI->addMemOperand(MF, MMO);
 476     }
 477   }
 478 }
 479
 480 /// PropagateBackward - Traverse backward and look for the definition of
 481 /// OldReg. If it can successfully update all of the references with NewReg,
 482 /// do so and return true.
 483 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
 484                                           MachineBasicBlock *MBB,
 485                                           unsigned OldReg, unsigned NewReg) {
 486   if (MII == MBB->begin())
 487     return false;
 488
 489   SmallVector<MachineOperand*, 4> Uses;
 490   SmallVector<MachineOperand*, 4> Refs;
 491   while (--MII != MBB->begin()) {
 492     bool FoundDef = false;  // Not counting 2address def.
 493
 494     Uses.clear();
 495     const TargetInstrDesc &TID = MII->getDesc();
 496     for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
 497       MachineOperand &MO = MII->getOperand(i);
 498       if (!MO.isReg())
 499         continue;
 500       unsigned Reg = MO.getReg();
 501       if (Reg == 0)
 502         continue;
 503       if (Reg == OldReg) {
 504         if (MO.isImplicit())
 505           return false;
 506         const TargetRegisterClass *RC = getInstrOperandRegClass(TRI, TID, i);
 507         if (RC && !RC->contains(NewReg))
 508           return false;
 509
 510         if (MO.isUse()) {
 511           Uses.push_back(&MO);
 512         } else {
 513           Refs.push_back(&MO);
 514           if (!MII->isRegTiedToUseOperand(i))
 515             FoundDef = true;
 516         }
 517       } else if (TRI->regsOverlap(Reg, NewReg)) {
 518         return false;
 519       } else if (TRI->regsOverlap(Reg, OldReg)) {
 520         if (!MO.isUse() || !MO.isKill())
 521           return false;
 522       }
 523     }
 524
 525     if (FoundDef) {
 526       // Found non-two-address def. Stop here.
 527       for (unsigned i = 0, e = Refs.size(); i != e; ++i)
 528         Refs[i]->setReg(NewReg);
 529       return true;
 530     }
 531
 532     // Two-address uses must be updated as well.
 533     for (unsigned i = 0, e = Uses.size(); i != e; ++i)
 534       Refs.push_back(Uses[i]);
 535   }
 536   return false;
 537 }
 538
 539 /// PropagateForward - Traverse forward and look for the kill of OldReg. If
 540 /// it can successfully update all of the uses with NewReg, do so and
 541 /// return true.
 542 bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
 543                                          MachineBasicBlock *MBB,
 544                                          unsigned OldReg, unsigned NewReg) {
 545   if (MII == MBB->end())
 546     return false;
 547
 548   SmallVector<MachineOperand*, 4> Uses;
 549   while (++MII != MBB->end()) {
 550     bool FoundUse = false;
 551     bool FoundKill = false;
 552     const TargetInstrDesc &TID = MII->getDesc();
 553     for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
 554       MachineOperand &MO = MII->getOperand(i);
 555       if (!MO.isReg())
 556         continue;
 557       unsigned Reg = MO.getReg();
 558       if (Reg == 0)
 559         continue;
 560       if (Reg == OldReg) {
 561         if (MO.isDef() || MO.isImplicit())
 562           return false;
 563
 564         const TargetRegisterClass *RC = getInstrOperandRegClass(TRI, TID, i);
 565         if (RC && !RC->contains(NewReg))
 566           return false;
 567         FoundUse = true;
 568         if (MO.isKill())
 569           FoundKill = true;
 570         Uses.push_back(&MO);
 571       } else if (TRI->regsOverlap(Reg, NewReg) ||
 572                  TRI->regsOverlap(Reg, OldReg))
 573         return false;
 574     }
 575     if (FoundKill) {
 576       for (unsigned i = 0, e = Uses.size(); i != e; ++i)
 577         Uses[i]->setReg(NewReg);
 578       return true;
 579     }
 580   }
 581   return false;
 582 }
 583
 584 /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
 585 /// folded memory references and replacing those references with register
 586 /// references instead.
 587 void
 588 StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
 589                                                unsigned Reg,
 590                                                const TargetRegisterClass *RC,
 591                                                SmallSet<unsigned, 4> &Defs,
 592                                                MachineFunction &MF) {
 593   MachineBasicBlock *MBB = MI->getParent();
 594   if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
 595     if (PropagateForward(MI, MBB, DstReg, Reg)) {
 596       DOUT << "Eliminated load: ";
 597       DEBUG(MI->dump());
 598       ++NumLoadElim;
 599     } else {
 600       TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC);
 601       ++NumRegRepl;
 602     }
 603
 604     if (!Defs.count(Reg)) {
 605       // If this is the first use of Reg in this MBB and it wasn't previously
 606       // defined in MBB, add it to livein.
 607       MBB->addLiveIn(Reg);
 608       Defs.insert(Reg);
 609     }
 610   } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
 611     if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
 612       DOUT << "Eliminated store: ";
 613       DEBUG(MI->dump());
 614       ++NumStoreElim;
 615     } else {
 616       TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC);
 617       ++NumRegRepl;
 618     }
 619
 620     // Remember reg has been defined in MBB.
 621     Defs.insert(Reg);
 622   } else {
 623     SmallVector<MachineInstr*, 4> NewMIs;
 624     bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
 625     Success = Success; // Silence compiler warning.
 626     assert(Success && "Failed to unfold!");
 627     MachineInstr *NewMI = NewMIs[0];
 628     MBB->insert(MI, NewMI);
 629     ++NumRegRepl;
 630
 631     if (NewMI->readsRegister(Reg)) {
 632       if (!Defs.count(Reg))
 633         // If this is the first use of Reg in this MBB and it wasn't previously
 634         // defined in MBB, add it to livein.
 635         MBB->addLiveIn(Reg);
 636       Defs.insert(Reg);
 637     }
 638   }
 639   MBB->erase(MI);
 640 }
 641
 642 /// RemoveDeadStores - Scan through a basic block and look for loads followed
 643 /// by stores.  If they're both using the same stack slot, then the store is
 644 /// definitely dead.  This could obviously be much more aggressive (consider
 645 /// pairs with instructions between them), but such extensions might have a
 646 /// considerable compile time impact.
 647 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
 648   // FIXME: This could be much more aggressive, but we need to investigate
 649   // the compile time impact of doing so.
 650   bool changed = false;
 651
 652   SmallVector<MachineInstr*, 4> toErase;
 653
 654   for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
 655        I != E; ++I) {
 656     if (DCELimit != -1 && (int)NumDead >= DCELimit)
 657       break;
 658
 659     MachineBasicBlock::iterator NextMI = next(I);
 660     if (NextMI == MBB->end()) continue;
 661
 662     int FirstSS, SecondSS;
 663     unsigned LoadReg = 0;
 664     unsigned StoreReg = 0;
 665     if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
 666     if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
 667     if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
 668
 669     ++NumDead;
 670     changed = true;
 671
 672     if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
 673       ++NumDead;
 674       toErase.push_back(I);
 675     }
 676
 677     toErase.push_back(NextMI);
 678     ++I;
 679   }
 680
 681   for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
 682        E = toErase.end(); I != E; ++I)
 683     (*I)->eraseFromParent();
 684
 685   return changed;
 686 }
 687
 688
 689 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
 690   DOUT << "********** Stack Slot Coloring **********\n";
 691
 692   MFI = MF.getFrameInfo();
 693   MRI = &MF.getRegInfo();
 694   TII = MF.getTarget().getInstrInfo();
 695   TRI = MF.getTarget().getRegisterInfo();
 696   LS = &getAnalysis<LiveStacks>();
 697   VRM = &getAnalysis<VirtRegMap>();
 698   loopInfo = &getAnalysis<MachineLoopInfo>();
 699
 700   bool Changed = false;
 701
 702   unsigned NumSlots = LS->getNumIntervals();
 703   if (NumSlots < 2) {
 704     if (NumSlots == 0 || !VRM->HasUnusedRegisters())
 705       // Nothing to do!
 706       return false;
 707   }
 708
 709   // Gather spill slot references
 710   ScanForSpillSlotRefs(MF);
 711   InitializeSlots();
 712   Changed = ColorSlots(MF);
 713
 714   NextColor = -1;
 715   SSIntervals.clear();
 716   for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
 717     SSRefs[i].clear();
 718   SSRefs.clear();
 719   OrigAlignments.clear();
 720   OrigSizes.clear();
 721   AllColors.clear();
 722   UsedColors.clear();
 723   for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
 724     Assignments[i].clear();
 725   Assignments.clear();
 726
 727   if (Changed) {
 728     for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
 729       Changed |= RemoveDeadStores(I);
 730   }
 731
 732   return Changed;
 733 }