utils/TableGen/AsmWriterEmitter.h

   1 //===- AsmWriterEmitter.h - Generate an assembly writer ---------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This tablegen backend is responsible for emitting an assembly printer for the
  11 // code generator.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef ASMWRITER_EMITTER_H
  16 #define ASMWRITER_EMITTER_H
  17
  18 #include "TableGenBackend.h"
  19 #include <map>
  20 #include <vector>
  21 #include <cassert>
  22
  23 namespace llvm {
  24   class AsmWriterInst;
  25   class CodeGenInstruction;
  26
  27   class AsmWriterEmitter : public TableGenBackend {
  28     RecordKeeper &Records;
  29     std::map<const CodeGenInstruction*, AsmWriterInst*> CGIAWIMap;
  30     std::vector<const CodeGenInstruction*> NumberedInstructions;
  31   public:
  32     AsmWriterEmitter(RecordKeeper &R) : Records(R) {}
  33
  34     // run - Output the asmwriter, returning true on failure.
  35     void run(std::ostream &o);
  36
  37 private:
  38     AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
  39       assert(ID < NumberedInstructions.size());
  40       std::map<const CodeGenInstruction*, AsmWriterInst*>::const_iterator I =
  41         CGIAWIMap.find(NumberedInstructions[ID]);
  42       assert(I != CGIAWIMap.end() && "Didn't find inst!");
  43       return I->second;
  44     }
  45     void FindUniqueOperandCommands(std::vector<std::string> &UOC,
  46                                    std::vector<unsigned> &InstIdxs,
  47                                    std::vector<unsigned> &InstOpsUsed) const;
  48   };
  49 }
  50 #endif