lib/CodeGen/SplitKit.cpp

   1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the SplitAnalysis class as well as mutator functions for
  11 // live range splitting.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #define DEBUG_TYPE "regalloc"
  16 #include "SplitKit.h"
  17 #include "LiveRangeEdit.h"
  18 #include "VirtRegMap.h"
  19 #include "llvm/ADT/Statistic.h"
  20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  21 #include "llvm/CodeGen/MachineDominators.h"
  22 #include "llvm/CodeGen/MachineInstrBuilder.h"
  23 #include "llvm/CodeGen/MachineRegisterInfo.h"
  24 #include "llvm/Support/Debug.h"
  25 #include "llvm/Support/raw_ostream.h"
  26 #include "llvm/Target/TargetInstrInfo.h"
  27 #include "llvm/Target/TargetMachine.h"
  28
  29 using namespace llvm;
  30
  31 STATISTIC(NumFinished, "Number of splits finished");
  32 STATISTIC(NumSimple,   "Number of splits that were simple");
  33
  34 //===----------------------------------------------------------------------===//
  35 //                                 Split Analysis
  36 //===----------------------------------------------------------------------===//
  37
  38 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
  39                              const LiveIntervals &lis,
  40                              const MachineLoopInfo &mli)
  41   : MF(vrm.getMachineFunction()),
  42     VRM(vrm),
  43     LIS(lis),
  44     Loops(mli),
  45     TII(*MF.getTarget().getInstrInfo()),
  46     CurLI(0),
  47     LastSplitPoint(MF.getNumBlockIDs()) {}
  48
  49 void SplitAnalysis::clear() {
  50   UseSlots.clear();
  51   UseBlocks.clear();
  52   ThroughBlocks.clear();
  53   CurLI = 0;
  54 }
  55
  56 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
  57   const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
  58   const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
  59   std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
  60
  61   // Compute split points on the first call. The pair is independent of the
  62   // current live interval.
  63   if (!LSP.first.isValid()) {
  64     MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
  65     if (FirstTerm == MBB->end())
  66       LSP.first = LIS.getMBBEndIdx(MBB);
  67     else
  68       LSP.first = LIS.getInstructionIndex(FirstTerm);
  69
  70     // If there is a landing pad successor, also find the call instruction.
  71     if (!LPad)
  72       return LSP.first;
  73     // There may not be a call instruction (?) in which case we ignore LPad.
  74     LSP.second = LSP.first;
  75     for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
  76          I != E; --I)
  77       if (I->getDesc().isCall()) {
  78         LSP.second = LIS.getInstructionIndex(I);
  79         break;
  80       }
  81   }
  82
  83   // If CurLI is live into a landing pad successor, move the last split point
  84   // back to the call that may throw.
  85   if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
  86     return LSP.second;
  87   else
  88     return LSP.first;
  89 }
  90
  91 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
  92 void SplitAnalysis::analyzeUses() {
  93   assert(UseSlots.empty() && "Call clear first");
  94
  95   // First get all the defs from the interval values. This provides the correct
  96   // slots for early clobbers.
  97   for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
  98        E = CurLI->vni_end(); I != E; ++I)
  99     if (!(*I)->isPHIDef() && !(*I)->isUnused())
 100       UseSlots.push_back((*I)->def);
 101
 102   // Get use slots form the use-def chain.
 103   const MachineRegisterInfo &MRI = MF.getRegInfo();
 104   for (MachineRegisterInfo::use_nodbg_iterator
 105        I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
 106        ++I)
 107     if (!I.getOperand().isUndef())
 108       UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
 109
 110   array_pod_sort(UseSlots.begin(), UseSlots.end());
 111
 112   // Remove duplicates, keeping the smaller slot for each instruction.
 113   // That is what we want for early clobbers.
 114   UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
 115                              SlotIndex::isSameInstr),
 116                  UseSlots.end());
 117
 118   // Compute per-live block info.
 119   if (!calcLiveBlockInfo()) {
 120     // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
 121     // I am looking at you, SimpleRegisterCoalescing!
 122     DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
 123     const_cast<LiveIntervals&>(LIS)
 124       .shrinkToUses(const_cast<LiveInterval*>(CurLI));
 125     UseBlocks.clear();
 126     ThroughBlocks.clear();
 127     bool fixed = calcLiveBlockInfo();
 128     (void)fixed;
 129     assert(fixed && "Couldn't fix broken live interval");
 130   }
 131
 132   DEBUG(dbgs() << "Analyze counted "
 133                << UseSlots.size() << " instrs in "
 134                << UseBlocks.size() << " blocks, through "
 135                << NumThroughBlocks << " blocks.\n");
 136 }
 137
 138 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
 139 /// where CurLI is live.
 140 bool SplitAnalysis::calcLiveBlockInfo() {
 141   ThroughBlocks.resize(MF.getNumBlockIDs());
 142   NumThroughBlocks = 0;
 143   if (CurLI->empty())
 144     return true;
 145
 146   LiveInterval::const_iterator LVI = CurLI->begin();
 147   LiveInterval::const_iterator LVE = CurLI->end();
 148
 149   SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
 150   UseI = UseSlots.begin();
 151   UseE = UseSlots.end();
 152
 153   // Loop over basic blocks where CurLI is live.
 154   MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
 155   for (;;) {
 156     BlockInfo BI;
 157     BI.MBB = MFI;
 158     SlotIndex Start, Stop;
 159     tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
 160
 161     // LVI is the first live segment overlapping MBB.
 162     BI.LiveIn = LVI->start <= Start;
 163     if (!BI.LiveIn)
 164       BI.Def = LVI->start;
 165
 166     // Find the first and last uses in the block.
 167     bool Uses = UseI != UseE && *UseI < Stop;
 168     if (Uses) {
 169       BI.FirstUse = *UseI;
 170       assert(BI.FirstUse >= Start);
 171       do ++UseI;
 172       while (UseI != UseE && *UseI < Stop);
 173       BI.LastUse = UseI[-1];
 174       assert(BI.LastUse < Stop);
 175     }
 176
 177     // Look for gaps in the live range.
 178     bool hasGap = false;
 179     BI.LiveOut = true;
 180     while (LVI->end < Stop) {
 181       SlotIndex LastStop = LVI->end;
 182       if (++LVI == LVE || LVI->start >= Stop) {
 183         BI.Kill = LastStop;
 184         BI.LiveOut = false;
 185         break;
 186       }
 187       if (LastStop < LVI->start) {
 188         hasGap = true;
 189         BI.Kill = LastStop;
 190         BI.Def = LVI->start;
 191       }
 192     }
 193
 194     // Don't set LiveThrough when the block has a gap.
 195     BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
 196     if (Uses)
 197       UseBlocks.push_back(BI);
 198     else {
 199       ++NumThroughBlocks;
 200       ThroughBlocks.set(BI.MBB->getNumber());
 201     }
 202     // FIXME: This should never happen. The live range stops or starts without a
 203     // corresponding use. An earlier pass did something wrong.
 204     if (!BI.LiveThrough && !Uses)
 205       return false;
 206
 207     // LVI is now at LVE or LVI->end >= Stop.
 208     if (LVI == LVE)
 209       break;
 210
 211     // Live segment ends exactly at Stop. Move to the next segment.
 212     if (LVI->end == Stop && ++LVI == LVE)
 213       break;
 214
 215     // Pick the next basic block.
 216     if (LVI->start < Stop)
 217       ++MFI;
 218     else
 219       MFI = LIS.getMBBFromIndex(LVI->start);
 220   }
 221   return true;
 222 }
 223
 224 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
 225   unsigned OrigReg = VRM.getOriginal(CurLI->reg);
 226   const LiveInterval &Orig = LIS.getInterval(OrigReg);
 227   assert(!Orig.empty() && "Splitting empty interval?");
 228   LiveInterval::const_iterator I = Orig.find(Idx);
 229
 230   // Range containing Idx should begin at Idx.
 231   if (I != Orig.end() && I->start <= Idx)
 232     return I->start == Idx;
 233
 234   // Range does not contain Idx, previous must end at Idx.
 235   return I != Orig.begin() && (--I)->end == Idx;
 236 }
 237
 238 void SplitAnalysis::analyze(const LiveInterval *li) {
 239   clear();
 240   CurLI = li;
 241   analyzeUses();
 242 }
 243
 244
 245 //===----------------------------------------------------------------------===//
 246 //                               Split Editor
 247 //===----------------------------------------------------------------------===//
 248
 249 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
 250 SplitEditor::SplitEditor(SplitAnalysis &sa,
 251                          LiveIntervals &lis,
 252                          VirtRegMap &vrm,
 253                          MachineDominatorTree &mdt)
 254   : SA(sa), LIS(lis), VRM(vrm),
 255     MRI(vrm.getMachineFunction().getRegInfo()),
 256     MDT(mdt),
 257     TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
 258     TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
 259     Edit(0),
 260     OpenIdx(0),
 261     RegAssign(Allocator)
 262 {}
 263
 264 void SplitEditor::reset(LiveRangeEdit &lre) {
 265   Edit = &lre;
 266   OpenIdx = 0;
 267   RegAssign.clear();
 268   Values.clear();
 269
 270   // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
 271   LiveOutSeen.clear();
 272
 273   // We don't need an AliasAnalysis since we will only be performing
 274   // cheap-as-a-copy remats anyway.
 275   Edit->anyRematerializable(LIS, TII, 0);
 276 }
 277
 278 void SplitEditor::dump() const {
 279   if (RegAssign.empty()) {
 280     dbgs() << " empty\n";
 281     return;
 282   }
 283
 284   for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
 285     dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
 286   dbgs() << '\n';
 287 }
 288
 289 VNInfo *SplitEditor::defValue(unsigned RegIdx,
 290                               const VNInfo *ParentVNI,
 291                               SlotIndex Idx) {
 292   assert(ParentVNI && "Mapping  NULL value");
 293   assert(Idx.isValid() && "Invalid SlotIndex");
 294   assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
 295   LiveInterval *LI = Edit->get(RegIdx);
 296
 297   // Create a new value.
 298   VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
 299
 300   // Use insert for lookup, so we can add missing values with a second lookup.
 301   std::pair<ValueMap::iterator, bool> InsP =
 302     Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
 303
 304   // This was the first time (RegIdx, ParentVNI) was mapped.
 305   // Keep it as a simple def without any liveness.
 306   if (InsP.second)
 307     return VNI;
 308
 309   // If the previous value was a simple mapping, add liveness for it now.
 310   if (VNInfo *OldVNI = InsP.first->second) {
 311     SlotIndex Def = OldVNI->def;
 312     LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
 313     // No longer a simple mapping.
 314     InsP.first->second = 0;
 315   }
 316
 317   // This is a complex mapping, add liveness for VNI
 318   SlotIndex Def = VNI->def;
 319   LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
 320
 321   return VNI;
 322 }
 323
 324 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
 325   assert(ParentVNI && "Mapping  NULL value");
 326   VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
 327
 328   // ParentVNI was either unmapped or already complex mapped. Either way.
 329   if (!VNI)
 330     return;
 331
 332   // This was previously a single mapping. Make sure the old def is represented
 333   // by a trivial live range.
 334   SlotIndex Def = VNI->def;
 335   Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
 336   VNI = 0;
 337 }
 338
 339 // extendRange - Extend the live range to reach Idx.
 340 // Potentially create phi-def values.
 341 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
 342   assert(Idx.isValid() && "Invalid SlotIndex");
 343   MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
 344   assert(IdxMBB && "No MBB at Idx");
 345   LiveInterval *LI = Edit->get(RegIdx);
 346
 347   // Is there a def in the same MBB we can extend?
 348   if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
 349     return;
 350
 351   // Now for the fun part. We know that ParentVNI potentially has multiple defs,
 352   // and we may need to create even more phi-defs to preserve VNInfo SSA form.
 353   // Perform a search for all predecessor blocks where we know the dominating
 354   // VNInfo.
 355   VNInfo *VNI = findReachingDefs(LI, IdxMBB, Idx.getNextSlot());
 356
 357   // When there were multiple different values, we may need new PHIs.
 358   if (!VNI)
 359     return updateSSA();
 360
 361   // Poor man's SSA update for the single-value case.
 362   LiveOutPair LOP(VNI, MDT[LIS.getMBBFromIndex(VNI->def)]);
 363   for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
 364          E = LiveInBlocks.end(); I != E; ++I) {
 365     MachineBasicBlock *MBB = I->DomNode->getBlock();
 366     SlotIndex Start = LIS.getMBBStartIdx(MBB);
 367     if (I->Kill.isValid())
 368       LI->addRange(LiveRange(Start, I->Kill, VNI));
 369     else {
 370       LiveOutCache[MBB] = LOP;
 371       LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
 372     }
 373   }
 374 }
 375
 376 /// findReachingDefs - Search the CFG for known live-out values.
 377 /// Add required live-in blocks to LiveInBlocks.
 378 VNInfo *SplitEditor::findReachingDefs(LiveInterval *LI,
 379                                       MachineBasicBlock *KillMBB,
 380                                       SlotIndex Kill) {
 381   // Initialize the live-out cache the first time it is needed.
 382   if (LiveOutSeen.empty()) {
 383     unsigned N = VRM.getMachineFunction().getNumBlockIDs();
 384     LiveOutSeen.resize(N);
 385     LiveOutCache.resize(N);
 386   }
 387
 388   // Blocks where LI should be live-in.
 389   SmallVector<MachineBasicBlock*, 16> WorkList(1, KillMBB);
 390
 391   // Remember if we have seen more than one value.
 392   bool UniqueVNI = true;
 393   VNInfo *TheVNI = 0;
 394
 395   // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
 396   for (unsigned i = 0; i != WorkList.size(); ++i) {
 397     MachineBasicBlock *MBB = WorkList[i];
 398     assert(!MBB->pred_empty() && "Value live-in to entry block?");
 399     for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
 400            PE = MBB->pred_end(); PI != PE; ++PI) {
 401        MachineBasicBlock *Pred = *PI;
 402        LiveOutPair &LOP = LiveOutCache[Pred];
 403
 404        // Is this a known live-out block?
 405        if (LiveOutSeen.test(Pred->getNumber())) {
 406          if (VNInfo *VNI = LOP.first) {
 407            if (TheVNI && TheVNI != VNI)
 408              UniqueVNI = false;
 409            TheVNI = VNI;
 410          }
 411          continue;
 412        }
 413
 414        // First time. LOP is garbage and must be cleared below.
 415        LiveOutSeen.set(Pred->getNumber());
 416
 417        // Does Pred provide a live-out value?
 418        SlotIndex Start, Last;
 419        tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
 420        Last = Last.getPrevSlot();
 421        VNInfo *VNI = LI->extendInBlock(Start, Last);
 422        LOP.first = VNI;
 423        if (VNI) {
 424          LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
 425          if (TheVNI && TheVNI != VNI)
 426            UniqueVNI = false;
 427          TheVNI = VNI;
 428          continue;
 429        }
 430        LOP.second = 0;
 431
 432        // No, we need a live-in value for Pred as well
 433        if (Pred != KillMBB)
 434           WorkList.push_back(Pred);
 435        else
 436           // Loopback to KillMBB, so value is really live through.
 437          Kill = SlotIndex();
 438     }
 439   }
 440
 441   // Transfer WorkList to LiveInBlocks in reverse order.
 442   // This ordering works best with updateSSA().
 443   LiveInBlocks.clear();
 444   LiveInBlocks.reserve(WorkList.size());
 445   while(!WorkList.empty())
 446     LiveInBlocks.push_back(MDT[WorkList.pop_back_val()]);
 447
 448   // The kill block may not be live-through.
 449   assert(LiveInBlocks.back().DomNode->getBlock() == KillMBB);
 450   LiveInBlocks.back().Kill = Kill;
 451
 452   return UniqueVNI ? TheVNI : 0;
 453 }
 454
 455 void SplitEditor::updateSSA() {
 456   // This is essentially the same iterative algorithm that SSAUpdater uses,
 457   // except we already have a dominator tree, so we don't have to recompute it.
 458   unsigned Changes;
 459   do {
 460     Changes = 0;
 461     // Propagate live-out values down the dominator tree, inserting phi-defs
 462     // when necessary.
 463     for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
 464            E = LiveInBlocks.end(); I != E; ++I) {
 465       MachineDomTreeNode *Node = I->DomNode;
 466       // Skip block if the live-in value has already been determined.
 467       if (!Node)
 468         continue;
 469       MachineBasicBlock *MBB = Node->getBlock();
 470       MachineDomTreeNode *IDom = Node->getIDom();
 471       LiveOutPair IDomValue;
 472
 473       // We need a live-in value to a block with no immediate dominator?
 474       // This is probably an unreachable block that has survived somehow.
 475       bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
 476
 477       // IDom dominates all of our predecessors, but it may not be their
 478       // immediate dominator. Check if any of them have live-out values that are
 479       // properly dominated by IDom. If so, we need a phi-def here.
 480       if (!needPHI) {
 481         IDomValue = LiveOutCache[IDom->getBlock()];
 482         for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
 483                PE = MBB->pred_end(); PI != PE; ++PI) {
 484           LiveOutPair Value = LiveOutCache[*PI];
 485           if (!Value.first || Value.first == IDomValue.first)
 486             continue;
 487           // This predecessor is carrying something other than IDomValue.
 488           // It could be because IDomValue hasn't propagated yet, or it could be
 489           // because MBB is in the dominance frontier of that value.
 490           if (MDT.dominates(IDom, Value.second)) {
 491             needPHI = true;
 492             break;
 493           }
 494         }
 495       }
 496
 497       // The value may be live-through even if Kill is set, as can happen when
 498       // we are called from extendRange. In that case LiveOutSeen is true, and
 499       // LiveOutCache indicates a foreign or missing value.
 500       LiveOutPair &LOP = LiveOutCache[MBB];
 501
 502       // Create a phi-def if required.
 503       if (needPHI) {
 504         ++Changes;
 505         SlotIndex Start = LIS.getMBBStartIdx(MBB);
 506         unsigned RegIdx = RegAssign.lookup(Start);
 507         LiveInterval *LI = Edit->get(RegIdx);
 508         VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
 509         VNI->setIsPHIDef(true);
 510         I->Value = VNI;
 511         // This block is done, we know the final value.
 512         I->DomNode = 0;
 513         if (I->Kill.isValid())
 514           LI->addRange(LiveRange(Start, I->Kill, VNI));
 515         else {
 516           LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
 517           LOP = LiveOutPair(VNI, Node);
 518         }
 519       } else if (IDomValue.first) {
 520         // No phi-def here. Remember incoming value.
 521         I->Value = IDomValue.first;
 522         if (I->Kill.isValid())
 523           continue;
 524         // Propagate IDomValue if needed:
 525         // MBB is live-out and doesn't define its own value.
 526         if (LOP.second != Node && LOP.first != IDomValue.first) {
 527           ++Changes;
 528           LOP = IDomValue;
 529         }
 530       }
 531     }
 532   } while (Changes);
 533
 534   // The values in LiveInBlocks are now accurate. No more phi-defs are needed
 535   // for these blocks, so we can color the live ranges.
 536   for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
 537          E = LiveInBlocks.end(); I != E; ++I) {
 538     if (!I->DomNode)
 539       continue;
 540     assert(I->Value && "No live-in value found");
 541     MachineBasicBlock *MBB = I->DomNode->getBlock();
 542     SlotIndex Start = LIS.getMBBStartIdx(MBB);
 543     unsigned RegIdx = RegAssign.lookup(Start);
 544     LiveInterval *LI = Edit->get(RegIdx);
 545     LI->addRange(LiveRange(Start, I->Kill.isValid() ?
 546                                   I->Kill : LIS.getMBBEndIdx(MBB), I->Value));
 547   }
 548 }
 549
 550 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
 551                                    VNInfo *ParentVNI,
 552                                    SlotIndex UseIdx,
 553                                    MachineBasicBlock &MBB,
 554                                    MachineBasicBlock::iterator I) {
 555   MachineInstr *CopyMI = 0;
 556   SlotIndex Def;
 557   LiveInterval *LI = Edit->get(RegIdx);
 558
 559   // Attempt cheap-as-a-copy rematerialization.
 560   LiveRangeEdit::Remat RM(ParentVNI);
 561   if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
 562     Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
 563   } else {
 564     // Can't remat, just insert a copy from parent.
 565     CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
 566                .addReg(Edit->getReg());
 567     Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
 568   }
 569
 570   // Define the value in Reg.
 571   VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
 572   VNI->setCopy(CopyMI);
 573   return VNI;
 574 }
 575
 576 /// Create a new virtual register and live interval.
 577 unsigned SplitEditor::openIntv() {
 578   // Create the complement as index 0.
 579   if (Edit->empty())
 580     Edit->create(LIS, VRM);
 581
 582   // Create the open interval.
 583   OpenIdx = Edit->size();
 584   Edit->create(LIS, VRM);
 585   return OpenIdx;
 586 }
 587
 588 void SplitEditor::selectIntv(unsigned Idx) {
 589   assert(Idx != 0 && "Cannot select the complement interval");
 590   assert(Idx < Edit->size() && "Can only select previously opened interval");
 591   OpenIdx = Idx;
 592 }
 593
 594 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
 595   assert(OpenIdx && "openIntv not called before enterIntvBefore");
 596   DEBUG(dbgs() << "    enterIntvBefore " << Idx);
 597   Idx = Idx.getBaseIndex();
 598   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
 599   if (!ParentVNI) {
 600     DEBUG(dbgs() << ": not live\n");
 601     return Idx;
 602   }
 603   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
 604   MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
 605   assert(MI && "enterIntvBefore called with invalid index");
 606
 607   VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
 608   return VNI->def;
 609 }
 610
 611 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
 612   assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
 613   SlotIndex End = LIS.getMBBEndIdx(&MBB);
 614   SlotIndex Last = End.getPrevSlot();
 615   DEBUG(dbgs() << "    enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
 616   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
 617   if (!ParentVNI) {
 618     DEBUG(dbgs() << ": not live\n");
 619     return End;
 620   }
 621   DEBUG(dbgs() << ": valno " << ParentVNI->id);
 622   VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
 623                               LIS.getLastSplitPoint(Edit->getParent(), &MBB));
 624   RegAssign.insert(VNI->def, End, OpenIdx);
 625   DEBUG(dump());
 626   return VNI->def;
 627 }
 628
 629 /// useIntv - indicate that all instructions in MBB should use OpenLI.
 630 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
 631   useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
 632 }
 633
 634 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
 635   assert(OpenIdx && "openIntv not called before useIntv");
 636   DEBUG(dbgs() << "    useIntv [" << Start << ';' << End << "):");
 637   RegAssign.insert(Start, End, OpenIdx);
 638   DEBUG(dump());
 639 }
 640
 641 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
 642   assert(OpenIdx && "openIntv not called before leaveIntvAfter");
 643   DEBUG(dbgs() << "    leaveIntvAfter " << Idx);
 644
 645   // The interval must be live beyond the instruction at Idx.
 646   Idx = Idx.getBoundaryIndex();
 647   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
 648   if (!ParentVNI) {
 649     DEBUG(dbgs() << ": not live\n");
 650     return Idx.getNextSlot();
 651   }
 652   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
 653
 654   MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
 655   assert(MI && "No instruction at index");
 656   VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
 657                               llvm::next(MachineBasicBlock::iterator(MI)));
 658   return VNI->def;
 659 }
 660
 661 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
 662   assert(OpenIdx && "openIntv not called before leaveIntvBefore");
 663   DEBUG(dbgs() << "    leaveIntvBefore " << Idx);
 664
 665   // The interval must be live into the instruction at Idx.
 666   Idx = Idx.getBoundaryIndex();
 667   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
 668   if (!ParentVNI) {
 669     DEBUG(dbgs() << ": not live\n");
 670     return Idx.getNextSlot();
 671   }
 672   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
 673
 674   MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
 675   assert(MI && "No instruction at index");
 676   VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
 677   return VNI->def;
 678 }
 679
 680 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
 681   assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
 682   SlotIndex Start = LIS.getMBBStartIdx(&MBB);
 683   DEBUG(dbgs() << "    leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
 684
 685   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
 686   if (!ParentVNI) {
 687     DEBUG(dbgs() << ": not live\n");
 688     return Start;
 689   }
 690
 691   VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
 692                               MBB.SkipPHIsAndLabels(MBB.begin()));
 693   RegAssign.insert(Start, VNI->def, OpenIdx);
 694   DEBUG(dump());
 695   return VNI->def;
 696 }
 697
 698 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
 699   assert(OpenIdx && "openIntv not called before overlapIntv");
 700   const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
 701   assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
 702          "Parent changes value in extended range");
 703   assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
 704          "Range cannot span basic blocks");
 705
 706   // The complement interval will be extended as needed by extendRange().
 707   if (ParentVNI)
 708     markComplexMapped(0, ParentVNI);
 709   DEBUG(dbgs() << "    overlapIntv [" << Start << ';' << End << "):");
 710   RegAssign.insert(Start, End, OpenIdx);
 711   DEBUG(dump());
 712 }
 713
 714 /// transferValues - Transfer all possible values to the new live ranges.
 715 /// Values that were rematerialized are left alone, they need extendRange().
 716 bool SplitEditor::transferValues() {
 717   bool Skipped = false;
 718   LiveInBlocks.clear();
 719   RegAssignMap::const_iterator AssignI = RegAssign.begin();
 720   for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
 721          ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
 722     DEBUG(dbgs() << "  blit " << *ParentI << ':');
 723     VNInfo *ParentVNI = ParentI->valno;
 724     // RegAssign has holes where RegIdx 0 should be used.
 725     SlotIndex Start = ParentI->start;
 726     AssignI.advanceTo(Start);
 727     do {
 728       unsigned RegIdx;
 729       SlotIndex End = ParentI->end;
 730       if (!AssignI.valid()) {
 731         RegIdx = 0;
 732       } else if (AssignI.start() <= Start) {
 733         RegIdx = AssignI.value();
 734         if (AssignI.stop() < End) {
 735           End = AssignI.stop();
 736           ++AssignI;
 737         }
 738       } else {
 739         RegIdx = 0;
 740         End = std::min(End, AssignI.start());
 741       }
 742
 743       // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
 744       DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
 745       LiveInterval *LI = Edit->get(RegIdx);
 746
 747       // Check for a simply defined value that can be blitted directly.
 748       if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
 749         DEBUG(dbgs() << ':' << VNI->id);
 750         LI->addRange(LiveRange(Start, End, VNI));
 751         Start = End;
 752         continue;
 753       }
 754
 755       // Skip rematerialized values, we need to use extendRange() and
 756       // extendPHIKillRanges() to completely recompute the live ranges.
 757       if (Edit->didRematerialize(ParentVNI)) {
 758         DEBUG(dbgs() << "(remat)");
 759         Skipped = true;
 760         Start = End;
 761         continue;
 762       }
 763
 764       // Initialize the live-out cache the first time it is needed.
 765       if (LiveOutSeen.empty()) {
 766         unsigned N = VRM.getMachineFunction().getNumBlockIDs();
 767         LiveOutSeen.resize(N);
 768         LiveOutCache.resize(N);
 769       }
 770
 771       // This value has multiple defs in RegIdx, but it wasn't rematerialized,
 772       // so the live range is accurate. Add live-in blocks in [Start;End) to the
 773       // LiveInBlocks.
 774       MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
 775       SlotIndex BlockStart, BlockEnd;
 776       tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
 777
 778       // The first block may be live-in, or it may have its own def.
 779       if (Start != BlockStart) {
 780         VNInfo *VNI = LI->extendInBlock(BlockStart,
 781                                         std::min(BlockEnd, End).getPrevSlot());
 782         assert(VNI && "Missing def for complex mapped value");
 783         DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
 784         // MBB has its own def. Is it also live-out?
 785         if (BlockEnd <= End) {
 786           LiveOutSeen.set(MBB->getNumber());
 787           LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
 788         }
 789         // Skip to the next block for live-in.
 790         ++MBB;
 791         BlockStart = BlockEnd;
 792       }
 793
 794       // Handle the live-in blocks covered by [Start;End).
 795       assert(Start <= BlockStart && "Expected live-in block");
 796       while (BlockStart < End) {
 797         DEBUG(dbgs() << ">BB#" << MBB->getNumber());
 798         BlockEnd = LIS.getMBBEndIdx(MBB);
 799         if (BlockStart == ParentVNI->def) {
 800           // This block has the def of a parent PHI, so it isn't live-in.
 801           assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
 802           VNInfo *VNI = LI->extendInBlock(BlockStart,
 803                                          std::min(BlockEnd, End).getPrevSlot());
 804           assert(VNI && "Missing def for complex mapped parent PHI");
 805           if (End >= BlockEnd) {
 806             // Live-out as well.
 807             LiveOutSeen.set(MBB->getNumber());
 808             LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
 809           }
 810         } else {
 811           // This block needs a live-in value.
 812           LiveInBlocks.push_back(MDT[MBB]);
 813           // The last block covered may not be live-out.
 814           if (End < BlockEnd)
 815             LiveInBlocks.back().Kill = End;
 816           else {
 817             // Live-out, but we need updateSSA to tell us the value.
 818             LiveOutSeen.set(MBB->getNumber());
 819             LiveOutCache[MBB] = LiveOutPair((VNInfo*)0,
 820                                             (MachineDomTreeNode*)0);
 821           }
 822         }
 823         BlockStart = BlockEnd;
 824         ++MBB;
 825       }
 826       Start = End;
 827     } while (Start != ParentI->end);
 828     DEBUG(dbgs() << '\n');
 829   }
 830
 831   if (!LiveInBlocks.empty())
 832     updateSSA();
 833
 834   return Skipped;
 835 }
 836
 837 void SplitEditor::extendPHIKillRanges() {
 838     // Extend live ranges to be live-out for successor PHI values.
 839   for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
 840        E = Edit->getParent().vni_end(); I != E; ++I) {
 841     const VNInfo *PHIVNI = *I;
 842     if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
 843       continue;
 844     unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
 845     MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
 846     for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
 847          PE = MBB->pred_end(); PI != PE; ++PI) {
 848       SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
 849       // The predecessor may not have a live-out value. That is OK, like an
 850       // undef PHI operand.
 851       if (Edit->getParent().liveAt(End)) {
 852         assert(RegAssign.lookup(End) == RegIdx &&
 853                "Different register assignment in phi predecessor");
 854         extendRange(RegIdx, End);
 855       }
 856     }
 857   }
 858 }
 859
 860 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
 861 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
 862   for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
 863        RE = MRI.reg_end(); RI != RE;) {
 864     MachineOperand &MO = RI.getOperand();
 865     MachineInstr *MI = MO.getParent();
 866     ++RI;
 867     // LiveDebugVariables should have handled all DBG_VALUE instructions.
 868     if (MI->isDebugValue()) {
 869       DEBUG(dbgs() << "Zapping " << *MI);
 870       MO.setReg(0);
 871       continue;
 872     }
 873
 874     // <undef> operands don't really read the register, so just assign them to
 875     // the complement.
 876     if (MO.isUse() && MO.isUndef()) {
 877       MO.setReg(Edit->get(0)->reg);
 878       continue;
 879     }
 880
 881     SlotIndex Idx = LIS.getInstructionIndex(MI);
 882     if (MO.isDef())
 883       Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
 884
 885     // Rewrite to the mapped register at Idx.
 886     unsigned RegIdx = RegAssign.lookup(Idx);
 887     MO.setReg(Edit->get(RegIdx)->reg);
 888     DEBUG(dbgs() << "  rewr BB#" << MI->getParent()->getNumber() << '\t'
 889                  << Idx << ':' << RegIdx << '\t' << *MI);
 890
 891     // Extend liveness to Idx if the instruction reads reg.
 892     if (!ExtendRanges)
 893       continue;
 894
 895     // Skip instructions that don't read Reg.
 896     if (MO.isDef()) {
 897       if (!MO.getSubReg() && !MO.isEarlyClobber())
 898         continue;
 899       // We may wan't to extend a live range for a partial redef, or for a use
 900       // tied to an early clobber.
 901       Idx = Idx.getPrevSlot();
 902       if (!Edit->getParent().liveAt(Idx))
 903         continue;
 904     } else
 905       Idx = Idx.getUseIndex();
 906
 907     extendRange(RegIdx, Idx);
 908   }
 909 }
 910
 911 void SplitEditor::deleteRematVictims() {
 912   SmallVector<MachineInstr*, 8> Dead;
 913   for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
 914     LiveInterval *LI = *I;
 915     for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
 916            LII != LIE; ++LII) {
 917       // Dead defs end at the store slot.
 918       if (LII->end != LII->valno->def.getNextSlot())
 919         continue;
 920       MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
 921       assert(MI && "Missing instruction for dead def");
 922       MI->addRegisterDead(LI->reg, &TRI);
 923
 924       if (!MI->allDefsAreDead())
 925         continue;
 926
 927       DEBUG(dbgs() << "All defs dead: " << *MI);
 928       Dead.push_back(MI);
 929     }
 930   }
 931
 932   if (Dead.empty())
 933     return;
 934
 935   Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
 936 }
 937
 938 void SplitEditor::finish() {
 939   ++NumFinished;
 940
 941   // At this point, the live intervals in Edit contain VNInfos corresponding to
 942   // the inserted copies.
 943
 944   // Add the original defs from the parent interval.
 945   for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
 946          E = Edit->getParent().vni_end(); I != E; ++I) {
 947     const VNInfo *ParentVNI = *I;
 948     if (ParentVNI->isUnused())
 949       continue;
 950     unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
 951     VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
 952     VNI->setIsPHIDef(ParentVNI->isPHIDef());
 953     VNI->setCopy(ParentVNI->getCopy());
 954
 955     // Mark rematted values as complex everywhere to force liveness computation.
 956     // The new live ranges may be truncated.
 957     if (Edit->didRematerialize(ParentVNI))
 958       for (unsigned i = 0, e = Edit->size(); i != e; ++i)
 959         markComplexMapped(i, ParentVNI);
 960   }
 961
 962 #ifndef NDEBUG
 963   // Every new interval must have a def by now, otherwise the split is bogus.
 964   for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
 965     assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
 966 #endif
 967
 968   // Transfer the simply mapped values, check if any are skipped.
 969   bool Skipped = transferValues();
 970   if (Skipped)
 971     extendPHIKillRanges();
 972   else
 973     ++NumSimple;
 974
 975   // Rewrite virtual registers, possibly extending ranges.
 976   rewriteAssigned(Skipped);
 977
 978   // Delete defs that were rematted everywhere.
 979   if (Skipped)
 980     deleteRematVictims();
 981
 982   // Get rid of unused values and set phi-kill flags.
 983   for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
 984     (*I)->RenumberValues(LIS);
 985
 986   // Now check if any registers were separated into multiple components.
 987   ConnectedVNInfoEqClasses ConEQ(LIS);
 988   for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
 989     // Don't use iterators, they are invalidated by create() below.
 990     LiveInterval *li = Edit->get(i);
 991     unsigned NumComp = ConEQ.Classify(li);
 992     if (NumComp <= 1)
 993       continue;
 994     DEBUG(dbgs() << "  " << NumComp << " components: " << *li << '\n');
 995     SmallVector<LiveInterval*, 8> dups;
 996     dups.push_back(li);
 997     for (unsigned i = 1; i != NumComp; ++i)
 998       dups.push_back(&Edit->create(LIS, VRM));
 999     ConEQ.Distribute(&dups[0], MRI);
1000   }
1001
1002   // Calculate spill weight and allocation hints for new intervals.
1003   Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
1004 }
1005
1006
1007 //===----------------------------------------------------------------------===//
1008 //                            Single Block Splitting
1009 //===----------------------------------------------------------------------===//
1010
1011 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1012 /// may be an advantage to split CurLI for the duration of the block.
1013 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1014   // If CurLI is local to one block, there is no point to splitting it.
1015   if (UseBlocks.size() <= 1)
1016     return false;
1017   // Add blocks with multiple uses.
1018   for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
1019     const BlockInfo &BI = UseBlocks[i];
1020     if (BI.FirstUse == BI.LastUse)
1021       continue;
1022     Blocks.insert(BI.MBB);
1023   }
1024   return !Blocks.empty();
1025 }
1026
1027 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
1028   openIntv();
1029   SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
1030   SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
1031     LastSplitPoint));
1032   if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
1033     useIntv(SegStart, leaveIntvAfter(BI.LastUse));
1034   } else {
1035       // The last use is after the last valid split point.
1036     SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
1037     useIntv(SegStart, SegStop);
1038     overlapIntv(SegStop, BI.LastUse);
1039   }
1040 }
1041
1042 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1043 /// basic block in Blocks.
1044 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1045   DEBUG(dbgs() << "  splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1046   ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
1047   for (unsigned i = 0; i != UseBlocks.size(); ++i) {
1048     const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
1049     if (Blocks.count(BI.MBB))
1050       splitSingleBlock(BI);
1051   }
1052   finish();
1053 }