1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines wrappers for the Target class and related global
11 // functionality. This makes it easier to access the data and provides a single
12 // place that needs to check it for validity. All of these classes throw
13 // exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
23 #include "llvm/Support/raw_ostream.h"
28 struct CodeGenRegister
;
31 // SelectionDAG node properties.
32 // SDNPMemOperand: indicates that a node touches memory and therefore must
33 // have an associated memory operand that describes the access.
50 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
51 /// record corresponds to.
52 MVT::SimpleValueType
getValueType(Record
*Rec
);
54 std::string
getName(MVT::SimpleValueType T
);
55 std::string
getEnumName(MVT::SimpleValueType T
);
57 /// getQualifiedName - Return the name of the specified record, with a
58 /// namespace qualifier if the record contains one.
59 std::string
getQualifiedName(const Record
*R
);
61 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
64 RecordKeeper
&Records
;
67 mutable DenseMap
<const Record
*, CodeGenInstruction
*> Instructions
;
68 mutable std::vector
<CodeGenRegister
> Registers
;
69 mutable std::vector
<Record
*> SubRegIndices
;
70 mutable std::vector
<CodeGenRegisterClass
> RegisterClasses
;
71 mutable std::vector
<MVT::SimpleValueType
> LegalValueTypes
;
72 void ReadRegisters() const;
73 void ReadSubRegIndices() const;
74 void ReadRegisterClasses() const;
75 void ReadInstructions() const;
76 void ReadLegalValueTypes() const;
78 mutable std::vector
<const CodeGenInstruction
*> InstrsByEnum
;
80 CodeGenTarget(RecordKeeper
&Records
);
82 Record
*getTargetRecord() const { return TargetRec
; }
83 const std::string
&getName() const;
85 /// getInstNamespace - Return the target-specific instruction namespace.
87 std::string
getInstNamespace() const;
89 /// getInstructionSet - Return the InstructionSet object.
91 Record
*getInstructionSet() const;
93 /// getAsmParser - Return the AssemblyParser definition for this target.
95 Record
*getAsmParser() const;
97 /// getAsmWriter - Return the AssemblyWriter definition for this target.
99 Record
*getAsmWriter() const;
101 const std::vector
<CodeGenRegister
> &getRegisters() const {
102 if (Registers
.empty()) ReadRegisters();
106 /// getRegisterByName - If there is a register with the specific AsmName,
108 const CodeGenRegister
*getRegisterByName(StringRef Name
) const;
110 const std::vector
<Record
*> &getSubRegIndices() const {
111 if (SubRegIndices
.empty()) ReadSubRegIndices();
112 return SubRegIndices
;
115 // Map a SubRegIndex Record to its number.
116 unsigned getSubRegIndexNo(Record
*idx
) const {
117 if (SubRegIndices
.empty()) ReadSubRegIndices();
118 std::vector
<Record
*>::const_iterator i
=
119 std::find(SubRegIndices
.begin(), SubRegIndices
.end(), idx
);
120 assert(i
!= SubRegIndices
.end() && "Not a SubRegIndex");
121 return (i
- SubRegIndices
.begin()) + 1;
124 // Create a new SubRegIndex with the given name.
125 Record
*createSubRegIndex(const std::string
&Name
);
127 const std::vector
<CodeGenRegisterClass
> &getRegisterClasses() const {
128 if (RegisterClasses
.empty()) ReadRegisterClasses();
129 return RegisterClasses
;
132 const CodeGenRegisterClass
&getRegisterClass(Record
*R
) const {
133 const std::vector
<CodeGenRegisterClass
> &RC
= getRegisterClasses();
134 for (unsigned i
= 0, e
= RC
.size(); i
!= e
; ++i
)
135 if (RC
[i
].TheDef
== R
)
137 assert(0 && "Didn't find the register class");
141 /// getRegisterClassForRegister - Find the register class that contains the
142 /// specified physical register. If the register is not in a register
143 /// class, return null. If the register is in multiple classes, and the
144 /// classes have a superset-subset relationship and the same set of
145 /// types, return the superclass. Otherwise return null.
146 const CodeGenRegisterClass
*getRegisterClassForRegister(Record
*R
) const {
147 const std::vector
<CodeGenRegisterClass
> &RCs
= getRegisterClasses();
148 const CodeGenRegisterClass
*FoundRC
= 0;
149 for (unsigned i
= 0, e
= RCs
.size(); i
!= e
; ++i
) {
150 const CodeGenRegisterClass
&RC
= RegisterClasses
[i
];
151 for (unsigned ei
= 0, ee
= RC
.Elements
.size(); ei
!= ee
; ++ei
) {
152 if (R
!= RC
.Elements
[ei
])
155 // If a register's classes have different types, return null.
156 if (FoundRC
&& RC
.getValueTypes() != FoundRC
->getValueTypes())
159 // If this is the first class that contains the register,
160 // make a note of it and go on to the next class.
166 std::vector
<Record
*> Elements(RC
.Elements
);
167 std::vector
<Record
*> FoundElements(FoundRC
->Elements
);
168 std::sort(Elements
.begin(), Elements
.end());
169 std::sort(FoundElements
.begin(), FoundElements
.end());
171 // Check to see if the previously found class that contains
172 // the register is a subclass of the current class. If so,
173 // prefer the superclass.
174 if (std::includes(Elements
.begin(), Elements
.end(),
175 FoundElements
.begin(), FoundElements
.end())) {
180 // Check to see if the previously found class that contains
181 // the register is a superclass of the current class. If so,
182 // prefer the superclass.
183 if (std::includes(FoundElements
.begin(), FoundElements
.end(),
184 Elements
.begin(), Elements
.end()))
187 // Multiple classes, and neither is a superclass of the other.
195 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
196 /// specified physical register.
197 std::vector
<MVT::SimpleValueType
> getRegisterVTs(Record
*R
) const;
199 const std::vector
<MVT::SimpleValueType
> &getLegalValueTypes() const {
200 if (LegalValueTypes
.empty()) ReadLegalValueTypes();
201 return LegalValueTypes
;
204 /// isLegalValueType - Return true if the specified value type is natively
205 /// supported by the target (i.e. there are registers that directly hold it).
206 bool isLegalValueType(MVT::SimpleValueType VT
) const {
207 const std::vector
<MVT::SimpleValueType
> &LegalVTs
= getLegalValueTypes();
208 for (unsigned i
= 0, e
= LegalVTs
.size(); i
!= e
; ++i
)
209 if (LegalVTs
[i
] == VT
) return true;
214 DenseMap
<const Record
*, CodeGenInstruction
*> &getInstructions() const {
215 if (Instructions
.empty()) ReadInstructions();
220 CodeGenInstruction
&getInstruction(const Record
*InstRec
) const {
221 if (Instructions
.empty()) ReadInstructions();
222 DenseMap
<const Record
*, CodeGenInstruction
*>::iterator I
=
223 Instructions
.find(InstRec
);
224 assert(I
!= Instructions
.end() && "Not an instruction");
228 /// getInstructionsByEnumValue - Return all of the instructions defined by the
229 /// target, ordered by their enum value.
230 const std::vector
<const CodeGenInstruction
*> &
231 getInstructionsByEnumValue() const {
232 if (InstrsByEnum
.empty()) ComputeInstrsByEnum();
236 typedef std::vector
<const CodeGenInstruction
*>::const_iterator inst_iterator
;
237 inst_iterator
inst_begin() const{return getInstructionsByEnumValue().begin();}
238 inst_iterator
inst_end() const { return getInstructionsByEnumValue().end(); }
241 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
243 bool isLittleEndianEncoding() const;
246 void ComputeInstrsByEnum() const;
249 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
250 /// tablegen class in TargetSelectionDAG.td
251 class ComplexPattern
{
252 MVT::SimpleValueType Ty
;
253 unsigned NumOperands
;
254 std::string SelectFunc
;
255 std::vector
<Record
*> RootNodes
;
256 unsigned Properties
; // Node properties
258 ComplexPattern() : NumOperands(0) {}
259 ComplexPattern(Record
*R
);
261 MVT::SimpleValueType
getValueType() const { return Ty
; }
262 unsigned getNumOperands() const { return NumOperands
; }
263 const std::string
&getSelectFunc() const { return SelectFunc
; }
264 const std::vector
<Record
*> &getRootNodes() const {
267 bool hasProperty(enum SDNP Prop
) const { return Properties
& (1 << Prop
); }
270 } // End llvm namespace