1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
3 define i32 @main(i32 %argc, i8** %argv) nounwind {
7 bb14.i: ; preds = %bb14.i, %entry
8 %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %0, %bb14.i ] ; <i32> [#uses=1]
9 %0 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
10 %1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
11 %2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
12 %3 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
13 %exitcond75.i = icmp eq i32 %0, 32 ; <i1> [#uses=1]
14 br i1 %exitcond75.i, label %bb24.i, label %bb14.i
16 bb24.i: ; preds = %bb14.i
17 %4 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
18 %5 = fdiv double %1, 0.000000e+00 ; <double> [#uses=1]
19 %6 = fdiv double %2, 0.000000e+00 ; <double> [#uses=1]
20 %7 = fdiv double %3, 0.000000e+00 ; <double> [#uses=1]
23 bb31.i: ; preds = %bb31.i, %bb24.i
24 %tmp.0.reg2mem.0.i = phi i32 [ 0, %bb24.i ], [ %indvar.next64.i, %bb31.i ] ; <i32> [#uses=1]
25 %indvar.next64.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
26 %exitcond65.i = icmp eq i32 %indvar.next64.i, 64 ; <i1> [#uses=1]
27 br i1 %exitcond65.i, label %bb33.i, label %bb31.i
29 bb33.i: ; preds = %bb31.i
30 br label %bb35.preheader.i
32 bb5.i.i: ; preds = %bb35.preheader.i
33 %8 = call double @floor(double 0.000000e+00) nounwind readnone ; <double> [#uses=0]
36 bb7.i.i: ; preds = %bb35.preheader.i, %bb5.i.i
37 br label %bb35.preheader.i
39 bb35.preheader.i: ; preds = %bb7.i.i, %bb33.i
40 %9 = fsub double 0.000000e+00, %4 ; <double> [#uses=1]
41 store double %9, double* null, align 8
42 %10 = fsub double 0.000000e+00, %5 ; <double> [#uses=1]
43 store double %10, double* null, align 8
44 %11 = fsub double 0.000000e+00, %6 ; <double> [#uses=1]
45 store double %11, double* null, align 8
46 %12 = fsub double 0.000000e+00, %7 ; <double> [#uses=1]
47 store double %12, double* null, align 8
48 br i1 false, label %bb7.i.i, label %bb5.i.i
51 declare double @floor(double) nounwind readnone