- Make BranchProbability constructor public.
[llvm/stm8.git] / lib / Target / PowerPC / PPCTargetMachine.h
blobbaf07e3498f810d2fe95250d42043bdc55f20f0f
1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameLowering.h"
18 #include "PPCSubtarget.h"
19 #include "PPCJITInfo.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCISelLowering.h"
22 #include "PPCSelectionDAGInfo.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetData.h"
26 namespace llvm {
27 class PassManager;
28 class GlobalValue;
30 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
31 ///
32 class PPCTargetMachine : public LLVMTargetMachine {
33 PPCSubtarget Subtarget;
34 const TargetData DataLayout; // Calculates type size & alignment
35 PPCInstrInfo InstrInfo;
36 PPCFrameLowering FrameLowering;
37 PPCJITInfo JITInfo;
38 PPCTargetLowering TLInfo;
39 PPCSelectionDAGInfo TSInfo;
40 InstrItineraryData InstrItins;
42 public:
43 PPCTargetMachine(const Target &T, const std::string &TT,
44 const std::string &CPU, const std::string &FS,
45 bool is64Bit);
47 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
48 virtual const PPCFrameLowering *getFrameLowering() const {
49 return &FrameLowering;
51 virtual PPCJITInfo *getJITInfo() { return &JITInfo; }
52 virtual const PPCTargetLowering *getTargetLowering() const {
53 return &TLInfo;
55 virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const {
56 return &TSInfo;
58 virtual const PPCRegisterInfo *getRegisterInfo() const {
59 return &InstrInfo.getRegisterInfo();
62 virtual const TargetData *getTargetData() const { return &DataLayout; }
63 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; }
64 virtual const InstrItineraryData *getInstrItineraryData() const {
65 return &InstrItins;
68 // Pass Pipeline Configuration
69 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
70 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
71 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
72 JITCodeEmitter &JCE);
73 virtual bool getEnableTailMergeDefault() const;
76 /// PPC32TargetMachine - PowerPC 32-bit target machine.
77 ///
78 class PPC32TargetMachine : public PPCTargetMachine {
79 public:
80 PPC32TargetMachine(const Target &T, const std::string &TT,
81 const std::string &CPU, const std::string &FS);
84 /// PPC64TargetMachine - PowerPC 64-bit target machine.
85 ///
86 class PPC64TargetMachine : public PPCTargetMachine {
87 public:
88 PPC64TargetMachine(const Target &T, const std::string &TT,
89 const std::string &CPU, const std::string &FS);
92 } // end namespace llvm
94 #endif