Use %ull here.
[llvm/stm8.git] / lib / Target / PTX / PTXInstrInfo.h
bloba04be7728f88bca947ad9a16050a0cc4354e91d2
1 //===- PTXInstrInfo.h - PTX Instruction Information -------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the PTX implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef PTX_INSTR_INFO_H
15 #define PTX_INSTR_INFO_H
17 #include "PTXRegisterInfo.h"
18 #include "llvm/Target/TargetInstrInfo.h"
20 namespace llvm {
21 class PTXTargetMachine;
23 class MachineSDNode;
24 class SDValue;
25 class SelectionDAG;
27 class PTXInstrInfo : public TargetInstrInfoImpl {
28 private:
29 const PTXRegisterInfo RI;
30 PTXTargetMachine &TM;
32 public:
33 explicit PTXInstrInfo(PTXTargetMachine &_TM);
35 virtual const PTXRegisterInfo &getRegisterInfo() const { return RI; }
37 virtual void copyPhysReg(MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator I, DebugLoc DL,
39 unsigned DstReg, unsigned SrcReg,
40 bool KillSrc) const;
42 virtual bool copyRegToReg(MachineBasicBlock &MBB,
43 MachineBasicBlock::iterator I,
44 unsigned DstReg, unsigned SrcReg,
45 const TargetRegisterClass *DstRC,
46 const TargetRegisterClass *SrcRC,
47 DebugLoc DL) const;
49 virtual bool isMoveInstr(const MachineInstr& MI,
50 unsigned &SrcReg, unsigned &DstReg,
51 unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
53 // predicate support
55 virtual bool isPredicated(const MachineInstr *MI) const;
57 virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
59 virtual
60 bool PredicateInstruction(MachineInstr *MI,
61 const SmallVectorImpl<MachineOperand> &Pred) const;
63 virtual
64 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
65 const SmallVectorImpl<MachineOperand> &Pred2) const;
67 virtual bool DefinesPredicate(MachineInstr *MI,
68 std::vector<MachineOperand> &Pred) const;
70 // PTX is fully-predicable
71 virtual bool isPredicable(MachineInstr *MI) const { return true; }
73 // branch support
75 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
76 MachineBasicBlock *&FBB,
77 SmallVectorImpl<MachineOperand> &Cond,
78 bool AllowModify = false) const;
80 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
82 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
83 MachineBasicBlock *FBB,
84 const SmallVectorImpl<MachineOperand> &Cond,
85 DebugLoc DL) const;
87 // static helper routines
89 static MachineSDNode *GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
90 DebugLoc dl, EVT VT,
91 SDValue Op1);
93 static MachineSDNode *GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
94 DebugLoc dl, EVT VT,
95 SDValue Op1, SDValue Op2);
97 static void AddDefaultPredicate(MachineInstr *MI);
99 static bool IsAnyKindOfBranch(const MachineInstr& inst);
101 static bool IsAnySuccessorAlsoLayoutSuccessor(const MachineBasicBlock& MBB);
103 static MachineBasicBlock *GetBranchTarget(const MachineInstr& inst);
104 }; // class PTXInstrInfo
105 } // namespace llvm
107 #endif // PTX_INSTR_INFO_H