lib/Target/SystemZ/SystemZRegisterInfo.cpp

   1 //===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the SystemZ implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "SystemZ.h"
  15 #include "SystemZInstrInfo.h"
  16 #include "SystemZMachineFunctionInfo.h"
  17 #include "SystemZRegisterInfo.h"
  18 #include "SystemZSubtarget.h"
  19 #include "llvm/CodeGen/MachineInstrBuilder.h"
  20 #include "llvm/CodeGen/MachineFrameInfo.h"
  21 #include "llvm/CodeGen/MachineFunction.h"
  22 #include "llvm/CodeGen/MachineRegisterInfo.h"
  23 #include "llvm/Target/TargetFrameLowering.h"
  24 #include "llvm/Target/TargetInstrInfo.h"
  25 #include "llvm/Target/TargetMachine.h"
  26 #include "llvm/Target/TargetOptions.h"
  27 #include "llvm/ADT/BitVector.h"
  28 using namespace llvm;
  29
  30 SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
  31                                          const SystemZInstrInfo &tii)
  32   : SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN),
  33     TM(tm), TII(tii) {
  34 }
  35
  36 const unsigned*
  37 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
  38   static const unsigned CalleeSavedRegs[] = {
  39     SystemZ::R6D,  SystemZ::R7D,  SystemZ::R8D,  SystemZ::R9D,
  40     SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
  41     SystemZ::R14D, SystemZ::R15D,
  42     SystemZ::F8L,  SystemZ::F9L,  SystemZ::F10L, SystemZ::F11L,
  43     SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
  44     0
  45   };
  46
  47   return CalleeSavedRegs;
  48 }
  49
  50 BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  51   BitVector Reserved(getNumRegs());
  52   const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
  53
  54   if (TFI->hasFP(MF))
  55     Reserved.set(SystemZ::R11D);
  56   Reserved.set(SystemZ::R14D);
  57   Reserved.set(SystemZ::R15D);
  58   return Reserved;
  59 }
  60
  61 void SystemZRegisterInfo::
  62 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
  63                               MachineBasicBlock::iterator I) const {
  64   MBB.erase(I);
  65 }
  66
  67 void
  68 SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
  69                                          int SPAdj, RegScavenger *RS) const {
  70   assert(SPAdj == 0 && "Unxpected");
  71
  72   unsigned i = 0;
  73   MachineInstr &MI = *II;
  74   MachineFunction &MF = *MI.getParent()->getParent();
  75   const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
  76
  77   while (!MI.getOperand(i).isFI()) {
  78     ++i;
  79     assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
  80   }
  81
  82   int FrameIndex = MI.getOperand(i).getIndex();
  83
  84   unsigned BasePtr = (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
  85
  86   // This must be part of a rri or ri operand memory reference.  Replace the
  87   // FrameIndex with base register with BasePtr.  Add an offset to the
  88   // displacement field.
  89   MI.getOperand(i).ChangeToRegister(BasePtr, false);
  90
  91   // Offset is a either 12-bit unsigned or 20-bit signed integer.
  92   // FIXME: handle "too long" displacements.
  93   int Offset =
  94     TFI->getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
  95
  96   // Check whether displacement is too long to fit into 12 bit zext field.
  97   MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset));
  98
  99   MI.getOperand(i+1).ChangeToImmediate(Offset);
 100 }
 101
 102 unsigned SystemZRegisterInfo::getRARegister() const {
 103   assert(0 && "What is the return address register");
 104   return 0;
 105 }
 106
 107 unsigned
 108 SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
 109   assert(0 && "What is the frame register");
 110   return 0;
 111 }
 112
 113 unsigned SystemZRegisterInfo::getEHExceptionRegister() const {
 114   assert(0 && "What is the exception register");
 115   return 0;
 116 }
 117
 118 unsigned SystemZRegisterInfo::getEHHandlerRegister() const {
 119   assert(0 && "What is the exception handler register");
 120   return 0;
 121 }
 122
 123 int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
 124   assert(0 && "What is the dwarf register number");
 125   return -1;
 126 }
 127
 128 #include "SystemZGenRegisterInfo.inc"