Use %ull here.
[llvm/stm8.git] / lib / Target / X86 / X86RegisterInfo.h
blobcccddfadd1fa3d33dd2128e03c5547b8afddc648
1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
17 #include "llvm/Target/TargetRegisterInfo.h"
18 #include "X86GenRegisterInfo.h.inc"
20 namespace llvm {
21 class Type;
22 class TargetInstrInfo;
23 class X86TargetMachine;
25 /// N86 namespace - Native X86 register numbers
26 ///
27 namespace N86 {
28 enum {
29 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
33 /// DWARFFlavour - Flavour of dwarf regnumbers
34 ///
35 namespace DWARFFlavour {
36 enum {
37 X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
41 class X86RegisterInfo : public X86GenRegisterInfo {
42 public:
43 X86TargetMachine &TM;
44 const TargetInstrInfo &TII;
46 private:
47 /// Is64Bit - Is the target 64-bits.
48 ///
49 bool Is64Bit;
51 /// IsWin64 - Is the target on of win64 flavours
52 ///
53 bool IsWin64;
55 /// SlotSize - Stack slot size in bytes.
56 ///
57 unsigned SlotSize;
59 /// StackAlign - Default stack alignment.
60 ///
61 unsigned StackAlign;
63 /// StackPtr - X86 physical register used as stack ptr.
64 ///
65 unsigned StackPtr;
67 /// FramePtr - X86 physical register used as frame ptr.
68 ///
69 unsigned FramePtr;
71 public:
72 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
74 /// getX86RegNum - Returns the native X86 register number for the given LLVM
75 /// register identifier.
76 static unsigned getX86RegNum(unsigned RegNo);
78 unsigned getStackAlignment() const { return StackAlign; }
80 /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum
81 /// (created by TableGen) for target dependencies.
82 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
84 /// Code Generation virtual methods...
85 ///
87 /// getMatchingSuperRegClass - Return a subclass of the specified register
88 /// class A so that each register in it has a sub-register of the
89 /// specified sub-register index which is in the specified register class B.
90 virtual const TargetRegisterClass *
91 getMatchingSuperRegClass(const TargetRegisterClass *A,
92 const TargetRegisterClass *B, unsigned Idx) const;
94 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
95 /// values.
96 const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
98 /// getCrossCopyRegClass - Returns a legal register class to copy a register
99 /// in the specified class to or from. Returns NULL if it is possible to copy
100 /// between a two registers of the specified class.
101 const TargetRegisterClass *
102 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
104 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
105 MachineFunction &MF) const;
107 /// getCalleeSavedRegs - Return a null-terminated list of all of the
108 /// callee-save registers on this target.
109 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
111 /// getReservedRegs - Returns a bitset indexed by physical register number
112 /// indicating if a register is a special register that has particular uses and
113 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
114 /// register scavenger to determine what registers are free.
115 BitVector getReservedRegs(const MachineFunction &MF) const;
117 bool canRealignStack(const MachineFunction &MF) const;
119 bool needsStackRealignment(const MachineFunction &MF) const;
121 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
122 int &FrameIdx) const;
124 void eliminateCallFramePseudoInstr(MachineFunction &MF,
125 MachineBasicBlock &MBB,
126 MachineBasicBlock::iterator MI) const;
128 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
129 int SPAdj, RegScavenger *RS = NULL) const;
131 // Debug information queries.
132 unsigned getRARegister() const;
133 unsigned getFrameRegister(const MachineFunction &MF) const;
134 unsigned getStackRegister() const { return StackPtr; }
135 // FIXME: Move to FrameInfok
136 unsigned getSlotSize() const { return SlotSize; }
138 // Exception handling queries.
139 unsigned getEHExceptionRegister() const;
140 unsigned getEHHandlerRegister() const;
143 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
144 // register of a specific X86 register.
145 // e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX
146 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
148 } // End llvm namespace
150 #endif