Use %ull here.
[llvm/stm8.git] / lib / Target / XCore / XCore.td
blob38401895e6345f22b55e99a9b9d843552c678da9
1 //===- XCore.td - Describe the XCore Target Machine --------*- tablegen -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
14 // Target-independent interfaces which we are implementing
15 //===----------------------------------------------------------------------===//
17 include "llvm/Target/Target.td"
19 //===----------------------------------------------------------------------===//
20 // Descriptions
21 //===----------------------------------------------------------------------===//
23 include "XCoreRegisterInfo.td"
24 include "XCoreInstrInfo.td"
25 include "XCoreCallingConv.td"
27 def XCoreInstrInfo : InstrInfo;
29 //===----------------------------------------------------------------------===//
30 // XCore processors supported.
31 //===----------------------------------------------------------------------===//
33 class Proc<string Name, list<SubtargetFeature> Features>
34  : Processor<Name, NoItineraries, Features>;
36 def : Proc<"generic",      []>;
37 def : Proc<"xs1b-generic", []>;
39 //===----------------------------------------------------------------------===//
40 // Declare the target which we are implementing
41 //===----------------------------------------------------------------------===//
43 def XCore : Target {
44   // Pull in Instruction Info:
45   let InstructionSet = XCoreInstrInfo;