lib/Target/CellSPU/SPUSubtarget.cpp

   1 //===- SPUSubtarget.cpp - STI Cell SPU Subtarget Information --------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the CellSPU-specific subclass of TargetSubtarget.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "SPUSubtarget.h"
  15 #include "SPU.h"
  16 #include "SPUGenSubtarget.inc"
  17 #include "llvm/ADT/SmallVector.h"
  18 #include "SPURegisterInfo.h"
  19
  20 using namespace llvm;
  21
  22 SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &FS) :
  23   StackAlignment(16),
  24   ProcDirective(SPU::DEFAULT_PROC),
  25   UseLargeMem(false)
  26 {
  27   // Should be the target SPU processor type. For now, since there's only
  28   // one, simply default to the current "v0" default:
  29   std::string default_cpu("v0");
  30
  31   // Parse features string.
  32   ParseSubtargetFeatures(FS, default_cpu);
  33 }
  34
  35 /// SetJITMode - This is called to inform the subtarget info that we are
  36 /// producing code for the JIT.
  37 void SPUSubtarget::SetJITMode() {
  38 }
  39
  40 /// Enable PostRA scheduling for optimization levels -O2 and -O3.
  41 bool SPUSubtarget::enablePostRAScheduler(
  42                        CodeGenOpt::Level OptLevel,
  43                        TargetSubtarget::AntiDepBreakMode& Mode,
  44                        RegClassVector& CriticalPathRCs) const {
  45   Mode = TargetSubtarget::ANTIDEP_CRITICAL;
  46   // CriticalPathsRCs seems to be the set of
  47   // RegisterClasses that antidep breakings are performed for.
  48   // Do it for all register classes
  49   CriticalPathRCs.clear();
  50   CriticalPathRCs.push_back(&SPU::R8CRegClass);
  51   CriticalPathRCs.push_back(&SPU::R16CRegClass);
  52   CriticalPathRCs.push_back(&SPU::R32CRegClass);
  53   CriticalPathRCs.push_back(&SPU::R32FPRegClass);
  54   CriticalPathRCs.push_back(&SPU::R64CRegClass);
  55   CriticalPathRCs.push_back(&SPU::VECREGRegClass);
  56   return OptLevel >= CodeGenOpt::Default;
  57 }