Silence -Wunused-variable in release builds.
[llvm/stm8.git] / lib / Target / ARM / ARM.h
blob8f77b04653f9efd3fa5e3df8df59be3d6f3080bf
1 //===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the entry points for global functions defined in the LLVM
11 // ARM back-end.
13 //===----------------------------------------------------------------------===//
15 #ifndef TARGET_ARM_H
16 #define TARGET_ARM_H
18 #include "ARMBaseInfo.h"
19 #include "llvm/Support/DataTypes.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include <cassert>
24 namespace llvm {
26 class ARMBaseTargetMachine;
27 class FunctionPass;
28 class JITCodeEmitter;
29 class formatted_raw_ostream;
30 class MCCodeEmitter;
31 class MCObjectWriter;
32 class TargetAsmBackend;
33 class MachineInstr;
34 class ARMAsmPrinter;
35 class MCInst;
37 MCCodeEmitter *createARMMCCodeEmitter(const Target &,
38 TargetMachine &TM,
39 MCContext &Ctx);
41 TargetAsmBackend *createARMAsmBackend(const Target &, const std::string &);
43 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
44 CodeGenOpt::Level OptLevel);
46 FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
47 JITCodeEmitter &JCE);
49 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
50 FunctionPass *createARMExpandPseudoPass();
51 FunctionPass *createARMGlobalMergePass(const TargetLowering* tli);
52 FunctionPass *createARMConstantIslandPass();
53 FunctionPass *createNEONMoveFixPass();
54 FunctionPass *createMLxExpansionPass();
55 FunctionPass *createThumb2ITBlockPass();
56 FunctionPass *createThumb2SizeReductionPass();
58 extern Target TheARMTarget, TheThumbTarget;
60 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
61 ARMAsmPrinter &AP);
63 /// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
64 MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
65 bool Is64Bit,
66 uint32_t CPUType,
67 uint32_t CPUSubtype);
69 } // end namespace llvm;
71 #endif