Silence -Wunused-variable in release builds.
[llvm/stm8.git] / lib / Target / ARM / ARMInstrInfo.cpp
blobadcbf1806fe3d182a221fbf37c80ae878d82e37a
1 //===- ARMInstrInfo.cpp - ARM Instruction Information -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the ARM implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "ARMInstrInfo.h"
15 #include "ARM.h"
16 #include "ARMAddressingModes.h"
17 #include "ARMMachineFunctionInfo.h"
18 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/CodeGen/LiveVariables.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineJumpTableInfo.h"
23 #include "llvm/MC/MCAsmInfo.h"
24 using namespace llvm;
26 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI)
27 : ARMBaseInstrInfo(STI), RI(*this, STI) {
30 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const {
31 switch (Opc) {
32 default: break;
33 case ARM::LDR_PRE:
34 case ARM::LDR_POST:
35 return ARM::LDRi12;
36 case ARM::LDRH_PRE:
37 case ARM::LDRH_POST:
38 return ARM::LDRH;
39 case ARM::LDRB_PRE:
40 case ARM::LDRB_POST:
41 return ARM::LDRBi12;
42 case ARM::LDRSH_PRE:
43 case ARM::LDRSH_POST:
44 return ARM::LDRSH;
45 case ARM::LDRSB_PRE:
46 case ARM::LDRSB_POST:
47 return ARM::LDRSB;
48 case ARM::STR_PRE:
49 case ARM::STR_POST:
50 return ARM::STRi12;
51 case ARM::STRH_PRE:
52 case ARM::STRH_POST:
53 return ARM::STRH;
54 case ARM::STRB_PRE:
55 case ARM::STRB_POST:
56 return ARM::STRBi12;
59 return 0;