lib/Target/ARM/Thumb1FrameLowering.cpp

   1 //======- Thumb1FrameLowering.cpp - Thumb1 Frame Information ---*- C++ -*-====//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Thumb1 implementation of TargetFrameLowering class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "Thumb1FrameLowering.h"
  15 #include "ARMBaseInstrInfo.h"
  16 #include "ARMMachineFunctionInfo.h"
  17 #include "llvm/CodeGen/MachineFrameInfo.h"
  18 #include "llvm/CodeGen/MachineFunction.h"
  19 #include "llvm/CodeGen/MachineInstrBuilder.h"
  20 #include "llvm/CodeGen/MachineRegisterInfo.h"
  21
  22 using namespace llvm;
  23
  24 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
  25   const MachineFrameInfo *FFI = MF.getFrameInfo();
  26   unsigned CFSize = FFI->getMaxCallFrameSize();
  27   // It's not always a good idea to include the call frame as part of the
  28   // stack frame. ARM (especially Thumb) has small immediate offset to
  29   // address the stack frame. So a large call frame can cause poor codegen
  30   // and may even makes it impossible to scavenge a register.
  31   if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
  32     return false;
  33
  34   return !MF.getFrameInfo()->hasVarSizedObjects();
  35 }
  36
  37 static void
  38 emitSPUpdate(MachineBasicBlock &MBB,
  39              MachineBasicBlock::iterator &MBBI,
  40              const TargetInstrInfo &TII, DebugLoc dl,
  41              const Thumb1RegisterInfo &MRI,
  42              int NumBytes, unsigned MIFlags = MachineInstr::NoFlags)  {
  43   emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
  44                             MRI, MIFlags);
  45 }
  46
  47 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
  48   MachineBasicBlock &MBB = MF.front();
  49   MachineBasicBlock::iterator MBBI = MBB.begin();
  50   MachineFrameInfo  *MFI = MF.getFrameInfo();
  51   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
  52   const Thumb1RegisterInfo *RegInfo =
  53     static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
  54   const Thumb1InstrInfo &TII =
  55     *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
  56
  57   unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
  58   unsigned NumBytes = MFI->getStackSize();
  59   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
  60   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
  61   unsigned FramePtr = RegInfo->getFrameRegister(MF);
  62   unsigned BasePtr = RegInfo->getBaseRegister();
  63
  64   // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
  65   NumBytes = (NumBytes + 3) & ~3;
  66   MFI->setStackSize(NumBytes);
  67
  68   // Determine the sizes of each callee-save spill areas and record which frame
  69   // belongs to which callee-save spill areas.
  70   unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
  71   int FramePtrSpillFI = 0;
  72
  73   if (VARegSaveSize)
  74     emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
  75                  MachineInstr::FrameSetup);
  76
  77   if (!AFI->hasStackFrame()) {
  78     if (NumBytes != 0)
  79       emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
  80                    MachineInstr::FrameSetup);
  81     return;
  82   }
  83
  84   for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
  85     unsigned Reg = CSI[i].getReg();
  86     int FI = CSI[i].getFrameIdx();
  87     switch (Reg) {
  88     case ARM::R4:
  89     case ARM::R5:
  90     case ARM::R6:
  91     case ARM::R7:
  92     case ARM::LR:
  93       if (Reg == FramePtr)
  94         FramePtrSpillFI = FI;
  95       AFI->addGPRCalleeSavedArea1Frame(FI);
  96       GPRCS1Size += 4;
  97       break;
  98     case ARM::R8:
  99     case ARM::R9:
 100     case ARM::R10:
 101     case ARM::R11:
 102       if (Reg == FramePtr)
 103         FramePtrSpillFI = FI;
 104       if (STI.isTargetDarwin()) {
 105         AFI->addGPRCalleeSavedArea2Frame(FI);
 106         GPRCS2Size += 4;
 107       } else {
 108         AFI->addGPRCalleeSavedArea1Frame(FI);
 109         GPRCS1Size += 4;
 110       }
 111       break;
 112     default:
 113       AFI->addDPRCalleeSavedAreaFrame(FI);
 114       DPRCSSize += 8;
 115     }
 116   }
 117
 118   if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
 119     ++MBBI;
 120     if (MBBI != MBB.end())
 121       dl = MBBI->getDebugLoc();
 122   }
 123
 124   // Determine starting offsets of spill areas.
 125   unsigned DPRCSOffset  = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
 126   unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
 127   unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
 128   AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
 129   AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
 130   AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
 131   AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
 132   NumBytes = DPRCSOffset;
 133
 134   // Adjust FP so it point to the stack slot that contains the previous FP.
 135   if (hasFP(MF)) {
 136     BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
 137       .addFrameIndex(FramePtrSpillFI).addImm(0)
 138       .setMIFlags(MachineInstr::FrameSetup);
 139     if (NumBytes > 508)
 140       // If offset is > 508 then sp cannot be adjusted in a single instruction,
 141       // try restoring from fp instead.
 142       AFI->setShouldRestoreSPFromFP(true);
 143   }
 144
 145   if (NumBytes)
 146     // Insert it after all the callee-save spills.
 147     emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
 148                  MachineInstr::FrameSetup);
 149
 150   if (STI.isTargetELF() && hasFP(MF))
 151     MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
 152                              AFI->getFramePtrSpillOffset());
 153
 154   AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
 155   AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
 156   AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
 157
 158   // If we need a base pointer, set it up here. It's whatever the value
 159   // of the stack pointer is at this point. Any variable size objects
 160   // will be allocated after this, so we can still use the base pointer
 161   // to reference locals.
 162   if (RegInfo->hasBasePointer(MF))
 163     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
 164                    .addReg(ARM::SP));
 165
 166   // If the frame has variable sized objects then the epilogue must restore
 167   // the sp from fp. We can assume there's an FP here since hasFP already
 168   // checks for hasVarSizedObjects.
 169   if (MFI->hasVarSizedObjects())
 170     AFI->setShouldRestoreSPFromFP(true);
 171 }
 172
 173 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
 174   for (unsigned i = 0; CSRegs[i]; ++i)
 175     if (Reg == CSRegs[i])
 176       return true;
 177   return false;
 178 }
 179
 180 static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) {
 181   if (MI->getOpcode() == ARM::tLDRspi &&
 182       MI->getOperand(1).isFI() &&
 183       isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
 184     return true;
 185   else if (MI->getOpcode() == ARM::tPOP) {
 186     // The first two operands are predicates. The last two are
 187     // imp-def and imp-use of SP. Check everything in between.
 188     for (int i = 2, e = MI->getNumOperands() - 2; i != e; ++i)
 189       if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
 190         return false;
 191     return true;
 192   }
 193   return false;
 194 }
 195
 196 void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
 197                                    MachineBasicBlock &MBB) const {
 198   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
 199   assert((MBBI->getOpcode() == ARM::tBX_RET ||
 200           MBBI->getOpcode() == ARM::tPOP_RET) &&
 201          "Can only insert epilog into returning blocks");
 202   DebugLoc dl = MBBI->getDebugLoc();
 203   MachineFrameInfo *MFI = MF.getFrameInfo();
 204   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
 205   const Thumb1RegisterInfo *RegInfo =
 206     static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
 207   const Thumb1InstrInfo &TII =
 208     *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
 209
 210   unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
 211   int NumBytes = (int)MFI->getStackSize();
 212   const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
 213   unsigned FramePtr = RegInfo->getFrameRegister(MF);
 214
 215   if (!AFI->hasStackFrame()) {
 216     if (NumBytes != 0)
 217       emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
 218   } else {
 219     // Unwind MBBI to point to first LDR / VLDRD.
 220     if (MBBI != MBB.begin()) {
 221       do
 222         --MBBI;
 223       while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
 224       if (!isCSRestore(MBBI, CSRegs))
 225         ++MBBI;
 226     }
 227
 228     // Move SP to start of FP callee save spill area.
 229     NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
 230                  AFI->getGPRCalleeSavedArea2Size() +
 231                  AFI->getDPRCalleeSavedAreaSize());
 232
 233     if (AFI->shouldRestoreSPFromFP()) {
 234       NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
 235       // Reset SP based on frame pointer only if the stack frame extends beyond
 236       // frame pointer stack slot, the target is ELF and the function has FP, or
 237       // the target uses var sized objects.
 238       if (NumBytes) {
 239         assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
 240                "No scratch register to restore SP from FP!");
 241         emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
 242                                   TII, *RegInfo);
 243         AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
 244                                ARM::SP)
 245           .addReg(ARM::R4));
 246       } else
 247         AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
 248                                ARM::SP)
 249           .addReg(FramePtr));
 250     } else {
 251       if (MBBI->getOpcode() == ARM::tBX_RET &&
 252           &MBB.front() != MBBI &&
 253           prior(MBBI)->getOpcode() == ARM::tPOP) {
 254         MachineBasicBlock::iterator PMBBI = prior(MBBI);
 255         emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
 256       } else
 257         emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
 258     }
 259   }
 260
 261   if (VARegSaveSize) {
 262     // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
 263     // to LR, and we can't pop the value directly to the PC since
 264     // we need to update the SP after popping the value. Therefore, we
 265     // pop the old LR into R3 as a temporary.
 266
 267     // Move back past the callee-saved register restoration
 268     while (MBBI != MBB.end() && isCSRestore(MBBI, CSRegs))
 269       ++MBBI;
 270     // Epilogue for vararg functions: pop LR to R3 and branch off it.
 271     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
 272       .addReg(ARM::R3, RegState::Define);
 273
 274     emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, VARegSaveSize);
 275
 276     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
 277       .addReg(ARM::R3, RegState::Kill));
 278     // erase the old tBX_RET instruction
 279     MBB.erase(MBBI);
 280   }
 281 }
 282
 283 bool Thumb1FrameLowering::
 284 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
 285                           MachineBasicBlock::iterator MI,
 286                           const std::vector<CalleeSavedInfo> &CSI,
 287                           const TargetRegisterInfo *TRI) const {
 288   if (CSI.empty())
 289     return false;
 290
 291   DebugLoc DL;
 292   MachineFunction &MF = *MBB.getParent();
 293   const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
 294
 295   if (MI != MBB.end()) DL = MI->getDebugLoc();
 296
 297   MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
 298   AddDefaultPred(MIB);
 299   for (unsigned i = CSI.size(); i != 0; --i) {
 300     unsigned Reg = CSI[i-1].getReg();
 301     bool isKill = true;
 302
 303     // Add the callee-saved register as live-in unless it's LR and
 304     // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
 305     // then it's already added to the function and entry block live-in sets.
 306     if (Reg == ARM::LR) {
 307       MachineFunction &MF = *MBB.getParent();
 308       if (MF.getFrameInfo()->isReturnAddressTaken() &&
 309           MF.getRegInfo().isLiveIn(Reg))
 310         isKill = false;
 311     }
 312
 313     if (isKill)
 314       MBB.addLiveIn(Reg);
 315
 316     MIB.addReg(Reg, getKillRegState(isKill));
 317   }
 318   MIB.setMIFlags(MachineInstr::FrameSetup);
 319   return true;
 320 }
 321
 322 bool Thumb1FrameLowering::
 323 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
 324                             MachineBasicBlock::iterator MI,
 325                             const std::vector<CalleeSavedInfo> &CSI,
 326                             const TargetRegisterInfo *TRI) const {
 327   if (CSI.empty())
 328     return false;
 329
 330   MachineFunction &MF = *MBB.getParent();
 331   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
 332   const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
 333
 334   bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
 335   DebugLoc DL = MI->getDebugLoc();
 336   MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
 337   AddDefaultPred(MIB);
 338
 339   bool NumRegs = false;
 340   for (unsigned i = CSI.size(); i != 0; --i) {
 341     unsigned Reg = CSI[i-1].getReg();
 342     if (Reg == ARM::LR) {
 343       // Special epilogue for vararg functions. See emitEpilogue
 344       if (isVarArg)
 345         continue;
 346       Reg = ARM::PC;
 347       (*MIB).setDesc(TII.get(ARM::tPOP_RET));
 348       MI = MBB.erase(MI);
 349     }
 350     MIB.addReg(Reg, getDefRegState(true));
 351     NumRegs = true;
 352   }
 353
 354   // It's illegal to emit pop instruction without operands.
 355   if (NumRegs)
 356     MBB.insert(MI, &*MIB);
 357   else
 358     MF.DeleteMachineInstr(MIB);
 359
 360   return true;
 361 }