1 //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 #include "SparcMCAsmInfo.h"
15 #include "SparcTargetMachine.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/Target/TargetRegistry.h"
20 extern "C" void LLVMInitializeSparcTarget() {
21 // Register the target.
22 RegisterTargetMachine
<SparcV8TargetMachine
> X(TheSparcTarget
);
23 RegisterTargetMachine
<SparcV9TargetMachine
> Y(TheSparcV9Target
);
25 RegisterAsmInfo
<SparcELFMCAsmInfo
> A(TheSparcTarget
);
26 RegisterAsmInfo
<SparcELFMCAsmInfo
> B(TheSparcV9Target
);
30 /// SparcTargetMachine ctor - Create an ILP32 architecture model
32 SparcTargetMachine::SparcTargetMachine(const Target
&T
, const std::string
&TT
,
33 const std::string
&CPU
,
34 const std::string
&FS
, bool is64bit
)
35 : LLVMTargetMachine(T
, TT
, CPU
, FS
),
36 Subtarget(TT
, CPU
, FS
, is64bit
),
37 DataLayout(Subtarget
.getDataLayout()),
38 TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget
),
39 FrameLowering(Subtarget
) {
42 bool SparcTargetMachine::addInstSelector(PassManagerBase
&PM
,
43 CodeGenOpt::Level OptLevel
) {
44 PM
.add(createSparcISelDag(*this));
48 /// addPreEmitPass - This pass may be implemented by targets that want to run
49 /// passes immediately before machine code is emitted. This should return
50 /// true if -print-machineinstrs should print out the code after the passes.
51 bool SparcTargetMachine::addPreEmitPass(PassManagerBase
&PM
,
52 CodeGenOpt::Level OptLevel
){
53 PM
.add(createSparcFPMoverPass(*this));
54 PM
.add(createSparcDelaySlotFillerPass(*this));
58 SparcV8TargetMachine::SparcV8TargetMachine(const Target
&T
,
59 const std::string
&TT
,
60 const std::string
&CPU
,
61 const std::string
&FS
)
62 : SparcTargetMachine(T
, TT
, CPU
, FS
, false) {
65 SparcV9TargetMachine::SparcV9TargetMachine(const Target
&T
,
66 const std::string
&TT
,
67 const std::string
&CPU
,
68 const std::string
&FS
)
69 : SparcTargetMachine(T
, TT
, CPU
, FS
, true) {