1 ; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
2 ; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
3 ; Check that calls to baz and quux are tail-merged.
7 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
8 target triple = "i686-apple-darwin8"
10 define i32 @f(i32 %i, i32 %q) {
12 %i_addr = alloca i32 ; <i32*> [#uses=2]
13 %q_addr = alloca i32 ; <i32*> [#uses=2]
14 %retval = alloca i32, align 4 ; <i32*> [#uses=1]
15 store i32 %i, i32* %i_addr
16 store i32 %q, i32* %q_addr
17 %tmp = load i32* %i_addr ; <i32> [#uses=1]
18 %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
19 %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
20 %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
21 br i1 %toBool, label %cond_true, label %cond_false
23 cond_true: ; preds = %entry
24 %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
25 %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
28 cond_false: ; preds = %entry
29 %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
30 %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
33 cond_next: ; preds = %cond_false, %cond_true
34 %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
35 %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
36 %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
37 %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
38 br i1 %toBool10, label %cond_true11, label %cond_false15
40 cond_true11: ; preds = %cond_next
41 %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
42 %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
45 cond_false15: ; preds = %cond_next
46 %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
47 %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
50 cond_next18: ; preds = %cond_false15, %cond_true11
51 %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
54 return: ; preds = %cond_next18
55 %retval20 = load i32* %retval ; <i32> [#uses=1]
65 declare i32 @quux(...)