Silence -Wunused-variable in release builds.
[llvm/stm8.git] / utils / TableGen / CodeGenTarget.cpp
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1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include <algorithm>
24 using namespace llvm;
26 static cl::opt<unsigned>
27 AsmParserNum("asmparsernum", cl::init(0),
28 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
30 static cl::opt<unsigned>
31 AsmWriterNum("asmwriternum", cl::init(0),
32 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
34 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
35 /// record corresponds to.
36 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
37 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
40 std::string llvm::getName(MVT::SimpleValueType T) {
41 switch (T) {
42 case MVT::Other: return "UNKNOWN";
43 case MVT::iPTR: return "TLI.getPointerTy()";
44 case MVT::iPTRAny: return "TLI.getPointerTy()";
45 default: return getEnumName(T);
49 std::string llvm::getEnumName(MVT::SimpleValueType T) {
50 switch (T) {
51 case MVT::Other: return "MVT::Other";
52 case MVT::i1: return "MVT::i1";
53 case MVT::i8: return "MVT::i8";
54 case MVT::i16: return "MVT::i16";
55 case MVT::i32: return "MVT::i32";
56 case MVT::i64: return "MVT::i64";
57 case MVT::i128: return "MVT::i128";
58 case MVT::iAny: return "MVT::iAny";
59 case MVT::fAny: return "MVT::fAny";
60 case MVT::vAny: return "MVT::vAny";
61 case MVT::f32: return "MVT::f32";
62 case MVT::f64: return "MVT::f64";
63 case MVT::f80: return "MVT::f80";
64 case MVT::f128: return "MVT::f128";
65 case MVT::ppcf128: return "MVT::ppcf128";
66 case MVT::x86mmx: return "MVT::x86mmx";
67 case MVT::Glue: return "MVT::Glue";
68 case MVT::isVoid: return "MVT::isVoid";
69 case MVT::v2i8: return "MVT::v2i8";
70 case MVT::v4i8: return "MVT::v4i8";
71 case MVT::v8i8: return "MVT::v8i8";
72 case MVT::v16i8: return "MVT::v16i8";
73 case MVT::v32i8: return "MVT::v32i8";
74 case MVT::v2i16: return "MVT::v2i16";
75 case MVT::v4i16: return "MVT::v4i16";
76 case MVT::v8i16: return "MVT::v8i16";
77 case MVT::v16i16: return "MVT::v16i16";
78 case MVT::v2i32: return "MVT::v2i32";
79 case MVT::v4i32: return "MVT::v4i32";
80 case MVT::v8i32: return "MVT::v8i32";
81 case MVT::v1i64: return "MVT::v1i64";
82 case MVT::v2i64: return "MVT::v2i64";
83 case MVT::v4i64: return "MVT::v4i64";
84 case MVT::v8i64: return "MVT::v8i64";
85 case MVT::v2f32: return "MVT::v2f32";
86 case MVT::v4f32: return "MVT::v4f32";
87 case MVT::v8f32: return "MVT::v8f32";
88 case MVT::v2f64: return "MVT::v2f64";
89 case MVT::v4f64: return "MVT::v4f64";
90 case MVT::Metadata: return "MVT::Metadata";
91 case MVT::iPTR: return "MVT::iPTR";
92 case MVT::iPTRAny: return "MVT::iPTRAny";
93 case MVT::untyped: return "MVT::untyped";
94 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
98 /// getQualifiedName - Return the name of the specified record, with a
99 /// namespace qualifier if the record contains one.
101 std::string llvm::getQualifiedName(const Record *R) {
102 std::string Namespace;
103 if (R->getValue("Namespace"))
104 Namespace = R->getValueAsString("Namespace");
105 if (Namespace.empty()) return R->getName();
106 return Namespace + "::" + R->getName();
110 /// getTarget - Return the current instance of the Target class.
112 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
113 : Records(records), RegBank(0) {
114 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
115 if (Targets.size() == 0)
116 throw std::string("ERROR: No 'Target' subclasses defined!");
117 if (Targets.size() != 1)
118 throw std::string("ERROR: Multiple subclasses of Target defined!");
119 TargetRec = Targets[0];
123 const std::string &CodeGenTarget::getName() const {
124 return TargetRec->getName();
127 std::string CodeGenTarget::getInstNamespace() const {
128 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
129 // Make sure not to pick up "TargetOpcode" by accidentally getting
130 // the namespace off the PHI instruction or something.
131 if ((*i)->Namespace != "TargetOpcode")
132 return (*i)->Namespace;
135 return "";
138 Record *CodeGenTarget::getInstructionSet() const {
139 return TargetRec->getValueAsDef("InstructionSet");
143 /// getAsmParser - Return the AssemblyParser definition for this target.
145 Record *CodeGenTarget::getAsmParser() const {
146 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
147 if (AsmParserNum >= LI.size())
148 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
149 return LI[AsmParserNum];
152 /// getAsmWriter - Return the AssemblyWriter definition for this target.
154 Record *CodeGenTarget::getAsmWriter() const {
155 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
156 if (AsmWriterNum >= LI.size())
157 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
158 return LI[AsmWriterNum];
161 CodeGenRegBank &CodeGenTarget::getRegBank() const {
162 if (!RegBank)
163 RegBank = new CodeGenRegBank(Records);
164 return *RegBank;
167 void CodeGenTarget::ReadRegAltNameIndices() const {
168 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
169 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
172 /// getRegisterByName - If there is a register with the specific AsmName,
173 /// return it.
174 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
175 const std::vector<CodeGenRegister*> &Regs = getRegBank().getRegisters();
176 for (unsigned i = 0, e = Regs.size(); i != e; ++i)
177 if (Regs[i]->TheDef->getValueAsString("AsmName") == Name)
178 return Regs[i];
180 return 0;
183 std::vector<MVT::SimpleValueType> CodeGenTarget::
184 getRegisterVTs(Record *R) const {
185 const CodeGenRegister *Reg = getRegBank().getReg(R);
186 std::vector<MVT::SimpleValueType> Result;
187 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
188 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
189 const CodeGenRegisterClass &RC = RCs[i];
190 if (RC.contains(Reg)) {
191 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
192 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
196 // Remove duplicates.
197 array_pod_sort(Result.begin(), Result.end());
198 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
199 return Result;
203 void CodeGenTarget::ReadLegalValueTypes() const {
204 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
205 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
206 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
207 LegalValueTypes.push_back(RCs[i].VTs[ri]);
209 // Remove duplicates.
210 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
211 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
212 LegalValueTypes.end()),
213 LegalValueTypes.end());
217 void CodeGenTarget::ReadInstructions() const {
218 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
219 if (Insts.size() <= 2)
220 throw std::string("No 'Instruction' subclasses defined!");
222 // Parse the instructions defined in the .td file.
223 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
224 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
227 static const CodeGenInstruction *
228 GetInstByName(const char *Name,
229 const DenseMap<const Record*, CodeGenInstruction*> &Insts,
230 RecordKeeper &Records) {
231 const Record *Rec = Records.getDef(Name);
233 DenseMap<const Record*, CodeGenInstruction*>::const_iterator
234 I = Insts.find(Rec);
235 if (Rec == 0 || I == Insts.end())
236 throw std::string("Could not find '") + Name + "' instruction!";
237 return I->second;
240 namespace {
241 /// SortInstByName - Sorting predicate to sort instructions by name.
243 struct SortInstByName {
244 bool operator()(const CodeGenInstruction *Rec1,
245 const CodeGenInstruction *Rec2) const {
246 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
251 /// getInstructionsByEnumValue - Return all of the instructions defined by the
252 /// target, ordered by their enum value.
253 void CodeGenTarget::ComputeInstrsByEnum() const {
254 // The ordering here must match the ordering in TargetOpcodes.h.
255 const char *const FixedInstrs[] = {
256 "PHI",
257 "INLINEASM",
258 "PROLOG_LABEL",
259 "EH_LABEL",
260 "GC_LABEL",
261 "KILL",
262 "EXTRACT_SUBREG",
263 "INSERT_SUBREG",
264 "IMPLICIT_DEF",
265 "SUBREG_TO_REG",
266 "COPY_TO_REGCLASS",
267 "DBG_VALUE",
268 "REG_SEQUENCE",
269 "COPY",
272 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
273 for (const char *const *p = FixedInstrs; *p; ++p) {
274 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
275 assert(Instr && "Missing target independent instruction");
276 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
277 InstrsByEnum.push_back(Instr);
279 unsigned EndOfPredefines = InstrsByEnum.size();
281 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
282 I = Insts.begin(), E = Insts.end(); I != E; ++I) {
283 const CodeGenInstruction *CGI = I->second;
284 if (CGI->Namespace != "TargetOpcode")
285 InstrsByEnum.push_back(CGI);
288 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
290 // All of the instructions are now in random order based on the map iteration.
291 // Sort them by name.
292 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(),
293 SortInstByName());
297 /// isLittleEndianEncoding - Return whether this target encodes its instruction
298 /// in little-endian format, i.e. bits laid out in the order [0..n]
300 bool CodeGenTarget::isLittleEndianEncoding() const {
301 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
304 //===----------------------------------------------------------------------===//
305 // ComplexPattern implementation
307 ComplexPattern::ComplexPattern(Record *R) {
308 Ty = ::getValueType(R->getValueAsDef("Ty"));
309 NumOperands = R->getValueAsInt("NumOperands");
310 SelectFunc = R->getValueAsString("SelectFunc");
311 RootNodes = R->getValueAsListOfDefs("RootNodes");
313 // Parse the properties.
314 Properties = 0;
315 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
316 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
317 if (PropList[i]->getName() == "SDNPHasChain") {
318 Properties |= 1 << SDNPHasChain;
319 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
320 Properties |= 1 << SDNPOptInGlue;
321 } else if (PropList[i]->getName() == "SDNPMayStore") {
322 Properties |= 1 << SDNPMayStore;
323 } else if (PropList[i]->getName() == "SDNPMayLoad") {
324 Properties |= 1 << SDNPMayLoad;
325 } else if (PropList[i]->getName() == "SDNPSideEffect") {
326 Properties |= 1 << SDNPSideEffect;
327 } else if (PropList[i]->getName() == "SDNPMemOperand") {
328 Properties |= 1 << SDNPMemOperand;
329 } else if (PropList[i]->getName() == "SDNPVariadic") {
330 Properties |= 1 << SDNPVariadic;
331 } else if (PropList[i]->getName() == "SDNPWantRoot") {
332 Properties |= 1 << SDNPWantRoot;
333 } else if (PropList[i]->getName() == "SDNPWantParent") {
334 Properties |= 1 << SDNPWantParent;
335 } else {
336 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
337 << "' on ComplexPattern '" << R->getName() << "'!\n";
338 exit(1);
342 //===----------------------------------------------------------------------===//
343 // CodeGenIntrinsic Implementation
344 //===----------------------------------------------------------------------===//
346 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
347 bool TargetOnly) {
348 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
350 std::vector<CodeGenIntrinsic> Result;
352 for (unsigned i = 0, e = I.size(); i != e; ++i) {
353 bool isTarget = I[i]->getValueAsBit("isTarget");
354 if (isTarget == TargetOnly)
355 Result.push_back(CodeGenIntrinsic(I[i]));
357 return Result;
360 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
361 TheDef = R;
362 std::string DefName = R->getName();
363 ModRef = ReadWriteMem;
364 isOverloaded = false;
365 isCommutative = false;
366 canThrow = false;
368 if (DefName.size() <= 4 ||
369 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
370 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
372 EnumName = std::string(DefName.begin()+4, DefName.end());
374 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
375 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
377 TargetPrefix = R->getValueAsString("TargetPrefix");
378 Name = R->getValueAsString("LLVMName");
380 if (Name == "") {
381 // If an explicit name isn't specified, derive one from the DefName.
382 Name = "llvm.";
384 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
385 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
386 } else {
387 // Verify it starts with "llvm.".
388 if (Name.size() <= 5 ||
389 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
390 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
393 // If TargetPrefix is specified, make sure that Name starts with
394 // "llvm.<targetprefix>.".
395 if (!TargetPrefix.empty()) {
396 if (Name.size() < 6+TargetPrefix.size() ||
397 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
398 != (TargetPrefix + "."))
399 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
400 TargetPrefix + ".'!";
403 // Parse the list of return types.
404 std::vector<MVT::SimpleValueType> OverloadedVTs;
405 ListInit *TypeList = R->getValueAsListInit("RetTypes");
406 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
407 Record *TyEl = TypeList->getElementAsRecord(i);
408 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
409 MVT::SimpleValueType VT;
410 if (TyEl->isSubClassOf("LLVMMatchType")) {
411 unsigned MatchTy = TyEl->getValueAsInt("Number");
412 assert(MatchTy < OverloadedVTs.size() &&
413 "Invalid matching number!");
414 VT = OverloadedVTs[MatchTy];
415 // It only makes sense to use the extended and truncated vector element
416 // variants with iAny types; otherwise, if the intrinsic is not
417 // overloaded, all the types can be specified directly.
418 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
419 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
420 VT == MVT::iAny || VT == MVT::vAny) &&
421 "Expected iAny or vAny type");
422 } else {
423 VT = getValueType(TyEl->getValueAsDef("VT"));
425 if (EVT(VT).isOverloaded()) {
426 OverloadedVTs.push_back(VT);
427 isOverloaded = true;
430 // Reject invalid types.
431 if (VT == MVT::isVoid)
432 throw "Intrinsic '" + DefName + " has void in result type list!";
434 IS.RetVTs.push_back(VT);
435 IS.RetTypeDefs.push_back(TyEl);
438 // Parse the list of parameter types.
439 TypeList = R->getValueAsListInit("ParamTypes");
440 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
441 Record *TyEl = TypeList->getElementAsRecord(i);
442 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
443 MVT::SimpleValueType VT;
444 if (TyEl->isSubClassOf("LLVMMatchType")) {
445 unsigned MatchTy = TyEl->getValueAsInt("Number");
446 assert(MatchTy < OverloadedVTs.size() &&
447 "Invalid matching number!");
448 VT = OverloadedVTs[MatchTy];
449 // It only makes sense to use the extended and truncated vector element
450 // variants with iAny types; otherwise, if the intrinsic is not
451 // overloaded, all the types can be specified directly.
452 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
453 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
454 VT == MVT::iAny || VT == MVT::vAny) &&
455 "Expected iAny or vAny type");
456 } else
457 VT = getValueType(TyEl->getValueAsDef("VT"));
459 if (EVT(VT).isOverloaded()) {
460 OverloadedVTs.push_back(VT);
461 isOverloaded = true;
464 // Reject invalid types.
465 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
466 throw "Intrinsic '" + DefName + " has void in result type list!";
468 IS.ParamVTs.push_back(VT);
469 IS.ParamTypeDefs.push_back(TyEl);
472 // Parse the intrinsic properties.
473 ListInit *PropList = R->getValueAsListInit("Properties");
474 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
475 Record *Property = PropList->getElementAsRecord(i);
476 assert(Property->isSubClassOf("IntrinsicProperty") &&
477 "Expected a property!");
479 if (Property->getName() == "IntrNoMem")
480 ModRef = NoMem;
481 else if (Property->getName() == "IntrReadArgMem")
482 ModRef = ReadArgMem;
483 else if (Property->getName() == "IntrReadMem")
484 ModRef = ReadMem;
485 else if (Property->getName() == "IntrReadWriteArgMem")
486 ModRef = ReadWriteArgMem;
487 else if (Property->getName() == "Commutative")
488 isCommutative = true;
489 else if (Property->getName() == "Throws")
490 canThrow = true;
491 else if (Property->isSubClassOf("NoCapture")) {
492 unsigned ArgNo = Property->getValueAsInt("ArgNo");
493 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
494 } else
495 assert(0 && "Unknown property!");
498 // Sort the argument attributes for later benefit.
499 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());