utils/TableGen/SubtargetEmitter.cpp

   1 //===- SubtargetEmitter.cpp - Generate subtarget enumerations -------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This tablegen backend emits subtarget enumerations.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "SubtargetEmitter.h"
  15 #include "CodeGenTarget.h"
  16 #include "Record.h"
  17 #include "llvm/ADT/StringExtras.h"
  18 #include "llvm/Support/Debug.h"
  19 #include <algorithm>
  20 using namespace llvm;
  21
  22 //
  23 // Enumeration - Emit the specified class as an enumeration.
  24 //
  25 void SubtargetEmitter::Enumeration(raw_ostream &OS,
  26                                    const char *ClassName,
  27                                    bool isBits) {
  28   // Get all records of class and sort
  29   std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
  30   std::sort(DefList.begin(), DefList.end(), LessRecord());
  31
  32   // Open enumeration
  33   OS << "enum {\n";
  34
  35   // For each record
  36   for (unsigned i = 0, N = DefList.size(); i < N;) {
  37     // Next record
  38     Record *Def = DefList[i];
  39
  40     // Get and emit name
  41     OS << "  " << Def->getName();
  42
  43     // If bit flags then emit expression (1 << i)
  44     if (isBits)  OS << " = " << " 1 << " << i;
  45
  46     // Depending on 'if more in the list' emit comma
  47     if (++i < N) OS << ",";
  48
  49     OS << "\n";
  50   }
  51
  52   // Close enumeration
  53   OS << "};\n";
  54 }
  55
  56 //
  57 // FeatureKeyValues - Emit data of all the subtarget features.  Used by the
  58 // command line.
  59 //
  60 void SubtargetEmitter::FeatureKeyValues(raw_ostream &OS) {
  61   // Gather and sort all the features
  62   std::vector<Record*> FeatureList =
  63                            Records.getAllDerivedDefinitions("SubtargetFeature");
  64   std::sort(FeatureList.begin(), FeatureList.end(), LessRecordFieldName());
  65
  66   // Begin feature table
  67   OS << "// Sorted (by key) array of values for CPU features.\n"
  68      << "static const llvm::SubtargetFeatureKV FeatureKV[] = {\n";
  69
  70   // For each feature
  71   for (unsigned i = 0, N = FeatureList.size(); i < N; ++i) {
  72     // Next feature
  73     Record *Feature = FeatureList[i];
  74
  75     const std::string &Name = Feature->getName();
  76     const std::string &CommandLineName = Feature->getValueAsString("Name");
  77     const std::string &Desc = Feature->getValueAsString("Desc");
  78
  79     if (CommandLineName.empty()) continue;
  80
  81     // Emit as { "feature", "description", featureEnum, i1 | i2 | ... | in }
  82     OS << "  { "
  83        << "\"" << CommandLineName << "\", "
  84        << "\"" << Desc << "\", "
  85        << Name << ", ";
  86
  87     const std::vector<Record*> &ImpliesList =
  88       Feature->getValueAsListOfDefs("Implies");
  89
  90     if (ImpliesList.empty()) {
  91       OS << "0";
  92     } else {
  93       for (unsigned j = 0, M = ImpliesList.size(); j < M;) {
  94         OS << ImpliesList[j]->getName();
  95         if (++j < M) OS << " | ";
  96       }
  97     }
  98
  99     OS << " }";
 100
 101     // Depending on 'if more in the list' emit comma
 102     if ((i + 1) < N) OS << ",";
 103
 104     OS << "\n";
 105   }
 106
 107   // End feature table
 108   OS << "};\n";
 109
 110   // Emit size of table
 111   OS<<"\nenum {\n";
 112   OS<<"  FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV)\n";
 113   OS<<"};\n";
 114 }
 115
 116 //
 117 // CPUKeyValues - Emit data of all the subtarget processors.  Used by command
 118 // line.
 119 //
 120 void SubtargetEmitter::CPUKeyValues(raw_ostream &OS) {
 121   // Gather and sort processor information
 122   std::vector<Record*> ProcessorList =
 123                           Records.getAllDerivedDefinitions("Processor");
 124   std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
 125
 126   // Begin processor table
 127   OS << "// Sorted (by key) array of values for CPU subtype.\n"
 128      << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
 129
 130   // For each processor
 131   for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
 132     // Next processor
 133     Record *Processor = ProcessorList[i];
 134
 135     const std::string &Name = Processor->getValueAsString("Name");
 136     const std::vector<Record*> &FeatureList =
 137       Processor->getValueAsListOfDefs("Features");
 138
 139     // Emit as { "cpu", "description", f1 | f2 | ... fn },
 140     OS << "  { "
 141        << "\"" << Name << "\", "
 142        << "\"Select the " << Name << " processor\", ";
 143
 144     if (FeatureList.empty()) {
 145       OS << "0";
 146     } else {
 147       for (unsigned j = 0, M = FeatureList.size(); j < M;) {
 148         OS << FeatureList[j]->getName();
 149         if (++j < M) OS << " | ";
 150       }
 151     }
 152
 153     // The "0" is for the "implies" section of this data structure.
 154     OS << ", 0 }";
 155
 156     // Depending on 'if more in the list' emit comma
 157     if (++i < N) OS << ",";
 158
 159     OS << "\n";
 160   }
 161
 162   // End processor table
 163   OS << "};\n";
 164
 165   // Emit size of table
 166   OS<<"\nenum {\n";
 167   OS<<"  SubTypeKVSize = sizeof(SubTypeKV)/sizeof(llvm::SubtargetFeatureKV)\n";
 168   OS<<"};\n";
 169 }
 170
 171 //
 172 // CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
 173 // Returns itinerary class count.
 174 //
 175 unsigned SubtargetEmitter::
 176 CollectAllItinClasses(raw_ostream &OS,
 177                       std::map<std::string, unsigned> &ItinClassesMap,
 178                       std::vector<Record*> &ItinClassList) {
 179   // For each itinerary class
 180   unsigned N = ItinClassList.size();
 181   for (unsigned i = 0; i < N; i++) {
 182     // Next itinerary class
 183     const Record *ItinClass = ItinClassList[i];
 184     // Get name of itinerary class
 185     // Assign itinerary class a unique number
 186     ItinClassesMap[ItinClass->getName()] = i;
 187   }
 188
 189   // Emit size of table
 190   OS<<"\nenum {\n";
 191   OS<<"  ItinClassesSize = " << N << "\n";
 192   OS<<"};\n";
 193
 194   // Return itinerary class count
 195   return N;
 196 }
 197
 198 //
 199 // FormItineraryStageString - Compose a string containing the stage
 200 // data initialization for the specified itinerary.  N is the number
 201 // of stages.
 202 //
 203 void SubtargetEmitter::FormItineraryStageString(const std::string &Name,
 204                                                 Record *ItinData,
 205                                                 std::string &ItinString,
 206                                                 unsigned &NStages) {
 207   // Get states list
 208   const std::vector<Record*> &StageList =
 209     ItinData->getValueAsListOfDefs("Stages");
 210
 211   // For each stage
 212   unsigned N = NStages = StageList.size();
 213   for (unsigned i = 0; i < N;) {
 214     // Next stage
 215     const Record *Stage = StageList[i];
 216
 217     // Form string as ,{ cycles, u1 | u2 | ... | un, timeinc, kind }
 218     int Cycles = Stage->getValueAsInt("Cycles");
 219     ItinString += "  { " + itostr(Cycles) + ", ";
 220
 221     // Get unit list
 222     const std::vector<Record*> &UnitList = Stage->getValueAsListOfDefs("Units");
 223
 224     // For each unit
 225     for (unsigned j = 0, M = UnitList.size(); j < M;) {
 226       // Add name and bitwise or
 227       ItinString += Name + "FU::" + UnitList[j]->getName();
 228       if (++j < M) ItinString += " | ";
 229     }
 230
 231     int TimeInc = Stage->getValueAsInt("TimeInc");
 232     ItinString += ", " + itostr(TimeInc);
 233
 234     int Kind = Stage->getValueAsInt("Kind");
 235     ItinString += ", (llvm::InstrStage::ReservationKinds)" + itostr(Kind);
 236
 237     // Close off stage
 238     ItinString += " }";
 239     if (++i < N) ItinString += ", ";
 240   }
 241 }
 242
 243 //
 244 // FormItineraryOperandCycleString - Compose a string containing the
 245 // operand cycle initialization for the specified itinerary.  N is the
 246 // number of operands that has cycles specified.
 247 //
 248 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData,
 249                          std::string &ItinString, unsigned &NOperandCycles) {
 250   // Get operand cycle list
 251   const std::vector<int64_t> &OperandCycleList =
 252     ItinData->getValueAsListOfInts("OperandCycles");
 253
 254   // For each operand cycle
 255   unsigned N = NOperandCycles = OperandCycleList.size();
 256   for (unsigned i = 0; i < N;) {
 257     // Next operand cycle
 258     const int OCycle = OperandCycleList[i];
 259
 260     ItinString += "  " + itostr(OCycle);
 261     if (++i < N) ItinString += ", ";
 262   }
 263 }
 264
 265 void SubtargetEmitter::FormItineraryBypassString(const std::string &Name,
 266                                                  Record *ItinData,
 267                                                  std::string &ItinString,
 268                                                  unsigned NOperandCycles) {
 269   const std::vector<Record*> &BypassList =
 270     ItinData->getValueAsListOfDefs("Bypasses");
 271   unsigned N = BypassList.size();
 272   unsigned i = 0;
 273   for (; i < N;) {
 274     ItinString += Name + "Bypass::" + BypassList[i]->getName();
 275     if (++i < NOperandCycles) ItinString += ", ";
 276   }
 277   for (; i < NOperandCycles;) {
 278     ItinString += " 0";
 279     if (++i < NOperandCycles) ItinString += ", ";
 280   }
 281 }
 282
 283 //
 284 // EmitStageAndOperandCycleData - Generate unique itinerary stages and
 285 // operand cycle tables.  Record itineraries for processors.
 286 //
 287 void SubtargetEmitter::EmitStageAndOperandCycleData(raw_ostream &OS,
 288        unsigned NItinClasses,
 289        std::map<std::string, unsigned> &ItinClassesMap,
 290        std::vector<Record*> &ItinClassList,
 291        std::vector<std::vector<InstrItinerary> > &ProcList) {
 292   // Gather processor iteraries
 293   std::vector<Record*> ProcItinList =
 294                        Records.getAllDerivedDefinitions("ProcessorItineraries");
 295
 296   // If just no itinerary then don't bother
 297   if (ProcItinList.size() < 2) return;
 298
 299   // Emit functional units for all the itineraries.
 300   for (unsigned i = 0, N = ProcItinList.size(); i < N; ++i) {
 301     // Next record
 302     Record *Proc = ProcItinList[i];
 303
 304     std::vector<Record*> FUs = Proc->getValueAsListOfDefs("FU");
 305     if (FUs.empty())
 306       continue;
 307
 308     const std::string &Name = Proc->getName();
 309     OS << "\n// Functional units for itineraries \"" << Name << "\"\n"
 310        << "namespace " << Name << "FU {\n";
 311
 312     for (unsigned j = 0, FUN = FUs.size(); j < FUN; ++j)
 313       OS << "  const unsigned " << FUs[j]->getName()
 314          << " = 1 << " << j << ";\n";
 315
 316     OS << "}\n";
 317
 318     std::vector<Record*> BPs = Proc->getValueAsListOfDefs("BP");
 319     if (BPs.size()) {
 320       OS << "\n// Pipeline forwarding pathes for itineraries \"" << Name
 321          << "\"\n" << "namespace " << Name << "Bypass {\n";
 322
 323       OS << "  const unsigned NoBypass = 0;\n";
 324       for (unsigned j = 0, BPN = BPs.size(); j < BPN; ++j)
 325         OS << "  const unsigned " << BPs[j]->getName()
 326            << " = 1 << " << j << ";\n";
 327
 328       OS << "}\n";
 329     }
 330   }
 331
 332   // Begin stages table
 333   std::string StageTable = "\nstatic const llvm::InstrStage Stages[] = {\n";
 334   StageTable += "  { 0, 0, 0, llvm::InstrStage::Required }, // No itinerary\n";
 335
 336   // Begin operand cycle table
 337   std::string OperandCycleTable = "static const unsigned OperandCycles[] = {\n";
 338   OperandCycleTable += "  0, // No itinerary\n";
 339
 340   // Begin pipeline bypass table
 341   std::string BypassTable = "static const unsigned ForwardingPathes[] = {\n";
 342   BypassTable += "  0, // No itinerary\n";
 343
 344   unsigned StageCount = 1, OperandCycleCount = 1;
 345   std::map<std::string, unsigned> ItinStageMap, ItinOperandMap;
 346   for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
 347     // Next record
 348     Record *Proc = ProcItinList[i];
 349
 350     // Get processor itinerary name
 351     const std::string &Name = Proc->getName();
 352
 353     // Skip default
 354     if (Name == "NoItineraries") continue;
 355
 356     // Create and expand processor itinerary to cover all itinerary classes
 357     std::vector<InstrItinerary> ItinList;
 358     ItinList.resize(NItinClasses);
 359
 360     // Get itinerary data list
 361     std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
 362
 363     // For each itinerary data
 364     for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
 365       // Next itinerary data
 366       Record *ItinData = ItinDataList[j];
 367
 368       // Get string and stage count
 369       std::string ItinStageString;
 370       unsigned NStages;
 371       FormItineraryStageString(Name, ItinData, ItinStageString, NStages);
 372
 373       // Get string and operand cycle count
 374       std::string ItinOperandCycleString;
 375       unsigned NOperandCycles;
 376       FormItineraryOperandCycleString(ItinData, ItinOperandCycleString,
 377                                       NOperandCycles);
 378
 379       std::string ItinBypassString;
 380       FormItineraryBypassString(Name, ItinData, ItinBypassString,
 381                                 NOperandCycles);
 382
 383       // Check to see if stage already exists and create if it doesn't
 384       unsigned FindStage = 0;
 385       if (NStages > 0) {
 386         FindStage = ItinStageMap[ItinStageString];
 387         if (FindStage == 0) {
 388           // Emit as { cycles, u1 | u2 | ... | un, timeinc }, // indices
 389           StageTable += ItinStageString + ", // " + itostr(StageCount);
 390           if (NStages > 1)
 391             StageTable += "-" + itostr(StageCount + NStages - 1);
 392           StageTable += "\n";
 393           // Record Itin class number.
 394           ItinStageMap[ItinStageString] = FindStage = StageCount;
 395           StageCount += NStages;
 396         }
 397       }
 398
 399       // Check to see if operand cycle already exists and create if it doesn't
 400       unsigned FindOperandCycle = 0;
 401       if (NOperandCycles > 0) {
 402         std::string ItinOperandString = ItinOperandCycleString+ItinBypassString;
 403         FindOperandCycle = ItinOperandMap[ItinOperandString];
 404         if (FindOperandCycle == 0) {
 405           // Emit as  cycle, // index
 406           OperandCycleTable += ItinOperandCycleString + ", // ";
 407           std::string OperandIdxComment = itostr(OperandCycleCount);
 408           if (NOperandCycles > 1)
 409             OperandIdxComment += "-"
 410               + itostr(OperandCycleCount + NOperandCycles - 1);
 411           OperandCycleTable += OperandIdxComment + "\n";
 412           // Record Itin class number.
 413           ItinOperandMap[ItinOperandCycleString] =
 414             FindOperandCycle = OperandCycleCount;
 415           // Emit as bypass, // index
 416           BypassTable += ItinBypassString + ", // " + OperandIdxComment + "\n";
 417           OperandCycleCount += NOperandCycles;
 418         }
 419       }
 420
 421       // Locate where to inject into processor itinerary table
 422       const std::string &Name = ItinData->getValueAsDef("TheClass")->getName();
 423       unsigned Find = ItinClassesMap[Name];
 424
 425       // Set up itinerary as location and location + stage count
 426       unsigned NumUOps = ItinClassList[Find]->getValueAsInt("NumMicroOps");
 427       InstrItinerary Intinerary = { NumUOps, FindStage, FindStage + NStages,
 428                                     FindOperandCycle,
 429                                     FindOperandCycle + NOperandCycles};
 430
 431       // Inject - empty slots will be 0, 0
 432       ItinList[Find] = Intinerary;
 433     }
 434
 435     // Add process itinerary to list
 436     ProcList.push_back(ItinList);
 437   }
 438
 439   // Closing stage
 440   StageTable += "  { 0, 0, 0, llvm::InstrStage::Required } // End itinerary\n";
 441   StageTable += "};\n";
 442
 443   // Closing operand cycles
 444   OperandCycleTable += "  0 // End itinerary\n";
 445   OperandCycleTable += "};\n";
 446
 447   BypassTable += "  0 // End itinerary\n";
 448   BypassTable += "};\n";
 449
 450   // Emit tables.
 451   OS << StageTable;
 452   OS << OperandCycleTable;
 453   OS << BypassTable;
 454
 455   // Emit size of tables
 456   OS<<"\nenum {\n";
 457   OS<<"  StagesSize = sizeof(Stages)/sizeof(llvm::InstrStage),\n";
 458   OS<<"  OperandCyclesSize = sizeof(OperandCycles)/sizeof(unsigned)\n";
 459   OS<<"};\n";
 460 }
 461
 462 //
 463 // EmitProcessorData - Generate data for processor itineraries.
 464 //
 465 void SubtargetEmitter::
 466 EmitProcessorData(raw_ostream &OS,
 467                   std::vector<Record*> &ItinClassList,
 468                   std::vector<std::vector<InstrItinerary> > &ProcList) {
 469   // Get an iterator for processor itinerary stages
 470   std::vector<std::vector<InstrItinerary> >::iterator
 471       ProcListIter = ProcList.begin();
 472
 473   // For each processor itinerary
 474   std::vector<Record*> Itins =
 475                        Records.getAllDerivedDefinitions("ProcessorItineraries");
 476   for (unsigned i = 0, N = Itins.size(); i < N; i++) {
 477     // Next record
 478     Record *Itin = Itins[i];
 479
 480     // Get processor itinerary name
 481     const std::string &Name = Itin->getName();
 482
 483     // Skip default
 484     if (Name == "NoItineraries") continue;
 485
 486     // Begin processor itinerary table
 487     OS << "\n";
 488     OS << "static const llvm::InstrItinerary " << Name << "[] = {\n";
 489
 490     // For each itinerary class
 491     std::vector<InstrItinerary> &ItinList = *ProcListIter++;
 492     assert(ItinList.size() == ItinClassList.size() && "bad itinerary");
 493     for (unsigned j = 0, M = ItinList.size(); j < M; ++j) {
 494       InstrItinerary &Intinerary = ItinList[j];
 495
 496       // Emit in the form of
 497       // { firstStage, lastStage, firstCycle, lastCycle } // index
 498       if (Intinerary.FirstStage == 0) {
 499         OS << "  { 1, 0, 0, 0, 0 }";
 500       } else {
 501         OS << "  { " <<
 502           Intinerary.NumMicroOps << ", " <<
 503           Intinerary.FirstStage << ", " <<
 504           Intinerary.LastStage << ", " <<
 505           Intinerary.FirstOperandCycle << ", " <<
 506           Intinerary.LastOperandCycle << " }";
 507       }
 508
 509       OS << ", // " << j << " " << ItinClassList[j]->getName() << "\n";
 510     }
 511
 512     // End processor itinerary table
 513     OS << "  { 1, ~0U, ~0U, ~0U, ~0U } // end marker\n";
 514     OS << "};\n";
 515   }
 516 }
 517
 518 //
 519 // EmitProcessorLookup - generate cpu name to itinerary lookup table.
 520 //
 521 void SubtargetEmitter::EmitProcessorLookup(raw_ostream &OS) {
 522   // Gather and sort processor information
 523   std::vector<Record*> ProcessorList =
 524                           Records.getAllDerivedDefinitions("Processor");
 525   std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
 526
 527   // Begin processor table
 528   OS << "\n";
 529   OS << "// Sorted (by key) array of itineraries for CPU subtype.\n"
 530      << "static const llvm::SubtargetInfoKV ProcItinKV[] = {\n";
 531
 532   // For each processor
 533   for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
 534     // Next processor
 535     Record *Processor = ProcessorList[i];
 536
 537     const std::string &Name = Processor->getValueAsString("Name");
 538     const std::string &ProcItin =
 539       Processor->getValueAsDef("ProcItin")->getName();
 540
 541     // Emit as { "cpu", procinit },
 542     OS << "  { "
 543        << "\"" << Name << "\", "
 544        << "(void *)&" << ProcItin;
 545
 546     OS << " }";
 547
 548     // Depending on ''if more in the list'' emit comma
 549     if (++i < N) OS << ",";
 550
 551     OS << "\n";
 552   }
 553
 554   // End processor table
 555   OS << "};\n";
 556
 557   // Emit size of table
 558   OS<<"\nenum {\n";
 559   OS<<"  ProcItinKVSize = sizeof(ProcItinKV)/"
 560                             "sizeof(llvm::SubtargetInfoKV)\n";
 561   OS<<"};\n";
 562 }
 563
 564 //
 565 // EmitData - Emits all stages and itineries, folding common patterns.
 566 //
 567 void SubtargetEmitter::EmitData(raw_ostream &OS) {
 568   std::map<std::string, unsigned> ItinClassesMap;
 569   // Gather and sort all itinerary classes
 570   std::vector<Record*> ItinClassList =
 571     Records.getAllDerivedDefinitions("InstrItinClass");
 572   std::sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
 573
 574   // Enumerate all the itinerary classes
 575   unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap,
 576                                                 ItinClassList);
 577   // Make sure the rest is worth the effort
 578   HasItineraries = NItinClasses != 1;   // Ignore NoItinerary.
 579
 580   if (HasItineraries) {
 581     std::vector<std::vector<InstrItinerary> > ProcList;
 582     // Emit the stage data
 583     EmitStageAndOperandCycleData(OS, NItinClasses, ItinClassesMap,
 584                                  ItinClassList, ProcList);
 585     // Emit the processor itinerary data
 586     EmitProcessorData(OS, ItinClassList, ProcList);
 587     // Emit the processor lookup data
 588     EmitProcessorLookup(OS);
 589   }
 590 }
 591
 592 //
 593 // ParseFeaturesFunction - Produces a subtarget specific function for parsing
 594 // the subtarget features string.
 595 //
 596 void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
 597   std::vector<Record*> Features =
 598                        Records.getAllDerivedDefinitions("SubtargetFeature");
 599   std::sort(Features.begin(), Features.end(), LessRecord());
 600
 601   OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
 602      << "// subtarget options.\n"
 603      << "std::string llvm::";
 604   OS << Target;
 605   OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
 606      << "                                  const std::string &CPU) {\n"
 607      << "  DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
 608      << "  DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n"
 609      << "  SubtargetFeatures Features(FS);\n"
 610      << "  Features.setCPUIfNone(CPU);\n"
 611      << "  uint32_t Bits =  Features.getBits(SubTypeKV, SubTypeKVSize,\n"
 612      << "                                    FeatureKV, FeatureKVSize);\n";
 613
 614   for (unsigned i = 0; i < Features.size(); i++) {
 615     // Next record
 616     Record *R = Features[i];
 617     const std::string &Instance = R->getName();
 618     const std::string &Value = R->getValueAsString("Value");
 619     const std::string &Attribute = R->getValueAsString("Attribute");
 620
 621     if (Value=="true" || Value=="false")
 622       OS << "  if ((Bits & " << Instance << ") != 0) "
 623          << Attribute << " = " << Value << ";\n";
 624     else
 625       OS << "  if ((Bits & " << Instance << ") != 0 && " << Attribute <<
 626             " < " << Value << ") " << Attribute << " = " << Value << ";\n";
 627   }
 628
 629   if (HasItineraries) {
 630     OS << "\n"
 631        << "  InstrItinerary *Itinerary = (InstrItinerary *)"
 632        <<              "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
 633        << "  InstrItins = InstrItineraryData(Stages, OperandCycles, "
 634        << "ForwardingPathes, Itinerary);\n";
 635   }
 636
 637   OS << "  return Features.getCPU();\n"
 638      << "}\n";
 639 }
 640
 641 //
 642 // SubtargetEmitter::run - Main subtarget enumeration emitter.
 643 //
 644 void SubtargetEmitter::run(raw_ostream &OS) {
 645   Target = CodeGenTarget(Records).getName();
 646
 647   EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
 648
 649   OS << "#include \"llvm/Support/Debug.h\"\n";
 650   OS << "#include \"llvm/Support/raw_ostream.h\"\n";
 651   OS << "#include \"llvm/Target/SubtargetFeature.h\"\n";
 652   OS << "#include \"llvm/Target/TargetInstrItineraries.h\"\n\n";
 653
 654 //  Enumeration(OS, "FuncUnit", true);
 655 //  OS<<"\n";
 656 //  Enumeration(OS, "InstrItinClass", false);
 657 //  OS<<"\n";
 658   Enumeration(OS, "SubtargetFeature", true);
 659   OS<<"\n";
 660   FeatureKeyValues(OS);
 661   OS<<"\n";
 662   CPUKeyValues(OS);
 663   OS<<"\n";
 664   EmitData(OS);
 665   OS<<"\n";
 666   ParseFeaturesFunction(OS);
 667 }