lib/CodeGen/LiveRangeEdit.h

   1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // The LiveRangeEdit class represents changes done to a virtual register when it
  11 // is spilled or split.
  12 //
  13 // The parent register is never changed. Instead, a number of new virtual
  14 // registers are created and added to the newRegs vector.
  15 //
  16 //===----------------------------------------------------------------------===//
  17
  18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
  19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
  20
  21 #include "llvm/CodeGen/LiveInterval.h"
  22 #include "llvm/ADT/SmallPtrSet.h"
  23
  24 namespace llvm {
  25
  26 class AliasAnalysis;
  27 class LiveIntervals;
  28 class MachineRegisterInfo;
  29 class VirtRegMap;
  30
  31 class LiveRangeEdit {
  32 public:
  33   /// Callback methods for LiveRangeEdit owners.
  34   struct Delegate {
  35     /// Called immediately before erasing a dead machine instruction.
  36     virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
  37
  38     /// Called when a virtual register is no longer used. Return false to defer
  39     /// its deletion from LiveIntervals.
  40     virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
  41
  42     /// Called before shrinking the live range of a virtual register.
  43     virtual void LRE_WillShrinkVirtReg(unsigned) {}
  44
  45     virtual ~Delegate() {}
  46   };
  47
  48 private:
  49   LiveInterval &parent_;
  50   SmallVectorImpl<LiveInterval*> &newRegs_;
  51   Delegate *const delegate_;
  52   const SmallVectorImpl<LiveInterval*> *uselessRegs_;
  53
  54   /// firstNew_ - Index of the first register added to newRegs_.
  55   const unsigned firstNew_;
  56
  57   /// scannedRemattable_ - true when remattable values have been identified.
  58   bool scannedRemattable_;
  59
  60   /// remattable_ - Values defined by remattable instructions as identified by
  61   /// tii.isTriviallyReMaterializable().
  62   SmallPtrSet<const VNInfo*,4> remattable_;
  63
  64   /// rematted_ - Values that were actually rematted, and so need to have their
  65   /// live range trimmed or entirely removed.
  66   SmallPtrSet<const VNInfo*,4> rematted_;
  67
  68   /// createFrom - Create a new virtual register based on OldReg.
  69   LiveInterval &createFrom(unsigned, LiveIntervals&, VirtRegMap &);
  70
  71   /// scanRemattable - Identify the parent_ values that may rematerialize.
  72   void scanRemattable(LiveIntervals &lis,
  73                       const TargetInstrInfo &tii,
  74                       AliasAnalysis *aa);
  75
  76   /// allUsesAvailableAt - Return true if all registers used by OrigMI at
  77   /// OrigIdx are also available with the same value at UseIdx.
  78   bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
  79                           SlotIndex UseIdx, LiveIntervals &lis);
  80
  81 public:
  82   /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
  83   /// @param parent The register being spilled or split.
  84   /// @param newRegs List to receive any new registers created. This needn't be
  85   ///                empty initially, any existing registers are ignored.
  86   /// @param uselessRegs List of registers that can't be used when
  87   ///        rematerializing values because they are about to be removed.
  88   LiveRangeEdit(LiveInterval &parent,
  89                 SmallVectorImpl<LiveInterval*> &newRegs,
  90                 Delegate *delegate = 0,
  91                 const SmallVectorImpl<LiveInterval*> *uselessRegs = 0)
  92     : parent_(parent), newRegs_(newRegs),
  93       delegate_(delegate),
  94       uselessRegs_(uselessRegs),
  95       firstNew_(newRegs.size()),
  96       scannedRemattable_(false) {}
  97
  98   LiveInterval &getParent() const { return parent_; }
  99   unsigned getReg() const { return parent_.reg; }
 100
 101   /// Iterator for accessing the new registers added by this edit.
 102   typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
 103   iterator begin() const { return newRegs_.begin()+firstNew_; }
 104   iterator end() const { return newRegs_.end(); }
 105   unsigned size() const { return newRegs_.size()-firstNew_; }
 106   bool empty() const { return size() == 0; }
 107   LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
 108
 109   /// FIXME: Temporary accessors until we can get rid of
 110   /// LiveIntervals::AddIntervalsForSpills
 111   SmallVectorImpl<LiveInterval*> *getNewVRegs() { return &newRegs_; }
 112   const SmallVectorImpl<LiveInterval*> *getUselessVRegs() {
 113     return uselessRegs_;
 114   }
 115
 116   /// create - Create a new register with the same class and original slot as
 117   /// parent.
 118   LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) {
 119     return createFrom(getReg(), LIS, VRM);
 120   }
 121
 122   /// anyRematerializable - Return true if any parent values may be
 123   /// rematerializable.
 124   /// This function must be called before any rematerialization is attempted.
 125   bool anyRematerializable(LiveIntervals&, const TargetInstrInfo&,
 126                            AliasAnalysis*);
 127
 128   /// Remat - Information needed to rematerialize at a specific location.
 129   struct Remat {
 130     VNInfo *ParentVNI;      // parent_'s value at the remat location.
 131     MachineInstr *OrigMI;   // Instruction defining ParentVNI.
 132     explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {}
 133   };
 134
 135   /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
 136   /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
 137   /// When cheapAsAMove is set, only cheap remats are allowed.
 138   bool canRematerializeAt(Remat &RM,
 139                           SlotIndex UseIdx,
 140                           bool cheapAsAMove,
 141                           LiveIntervals &lis);
 142
 143   /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
 144   /// instruction into MBB before MI. The new instruction is mapped, but
 145   /// liveness is not updated.
 146   /// Return the SlotIndex of the new instruction.
 147   SlotIndex rematerializeAt(MachineBasicBlock &MBB,
 148                             MachineBasicBlock::iterator MI,
 149                             unsigned DestReg,
 150                             const Remat &RM,
 151                             LiveIntervals&,
 152                             const TargetInstrInfo&,
 153                             const TargetRegisterInfo&);
 154
 155   /// markRematerialized - explicitly mark a value as rematerialized after doing
 156   /// it manually.
 157   void markRematerialized(const VNInfo *ParentVNI) {
 158     rematted_.insert(ParentVNI);
 159   }
 160
 161   /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
 162   bool didRematerialize(const VNInfo *ParentVNI) const {
 163     return rematted_.count(ParentVNI);
 164   }
 165
 166   /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
 167   /// to erase it from LIS.
 168   void eraseVirtReg(unsigned Reg, LiveIntervals &LIS);
 169
 170   /// eliminateDeadDefs - Try to delete machine instructions that are now dead
 171   /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
 172   /// and further dead efs to be eliminated.
 173   void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
 174                          LiveIntervals&, VirtRegMap&,
 175                          const TargetInstrInfo&);
 176
 177 };
 178
 179 }
 180
 181 #endif