lib/Target/CellSPU/SPURegisterInfo.h

   1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Cell SPU implementation of the TargetRegisterInfo
  11 // class.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef SPU_REGISTERINFO_H
  16 #define SPU_REGISTERINFO_H
  17
  18 #include "SPU.h"
  19
  20 #define GET_REGINFO_HEADER
  21 #include "SPUGenRegisterInfo.inc"
  22
  23 namespace llvm {
  24   class SPUSubtarget;
  25   class TargetInstrInfo;
  26   class Type;
  27
  28   class SPURegisterInfo : public SPUGenRegisterInfo {
  29   private:
  30     const SPUSubtarget &Subtarget;
  31     const TargetInstrInfo &TII;
  32
  33     //! Predicate: Does the machine function use the link register?
  34     bool usesLR(MachineFunction &MF) const;
  35
  36   public:
  37     SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
  38
  39     //! Translate a register's enum value to a register number
  40     /*!
  41       This method translates a register's enum value to it's regiser number,
  42       e.g. SPU::R14 -> 14.
  43      */
  44     static unsigned getRegisterNumbering(unsigned RegEnum);
  45
  46     /// getPointerRegClass - Return the register class to use to hold pointers.
  47     /// This is used for addressing modes.
  48     virtual const TargetRegisterClass *
  49     getPointerRegClass(unsigned Kind = 0) const;
  50
  51     /// After allocating this many registers, the allocator should feel
  52     /// register pressure. The value is a somewhat random guess, based on the
  53     /// number of non callee saved registers in the C calling convention.
  54     virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC,
  55                                           MachineFunction &MF) const{
  56       return 50;
  57     }
  58
  59     //! Return the array of callee-saved registers
  60     virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
  61
  62     //! Allow for scavenging, so we can get scratch registers when needed.
  63     virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
  64     { return true; }
  65
  66     //! Return the reserved registers
  67     BitVector getReservedRegs(const MachineFunction &MF) const;
  68
  69     //! Eliminate the call frame setup pseudo-instructions
  70     void eliminateCallFramePseudoInstr(MachineFunction &MF,
  71                                        MachineBasicBlock &MBB,
  72                                        MachineBasicBlock::iterator I) const;
  73     //! Convert frame indicies into machine operands
  74     void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
  75                              RegScavenger *RS = NULL) const;
  76
  77     //! Get return address register (LR, aka R0)
  78     unsigned getRARegister() const;
  79     //! Get the stack frame register (SP, aka R1)
  80     unsigned getFrameRegister(const MachineFunction &MF) const;
  81
  82     //------------------------------------------------------------------------
  83     // New methods added:
  84     //------------------------------------------------------------------------
  85
  86     //! Get DWARF debugging register number
  87     int getDwarfRegNum(unsigned RegNum, bool isEH) const;
  88     int getLLVMRegNum(unsigned RegNum, bool isEH) const;
  89
  90     //! Convert D-form load/store to X-form load/store
  91     /*!
  92       Converts a regiser displacement load/store into a register-indexed
  93       load/store for large stack frames, when the stack frame exceeds the
  94       range of a s10 displacement.
  95      */
  96     int convertDFormToXForm(int dFormOpcode) const;
  97
  98     //! Acquire an unused register in an emergency.
  99     unsigned findScratchRegister(MachineBasicBlock::iterator II,
 100                                  RegScavenger *RS,
 101                                  const TargetRegisterClass *RC,
 102                                  int SPAdj) const;
 103
 104   };
 105 } // end namespace llvm
 106
 107 #endif