lib/Target/MBlaze/MBlazeSubtarget.cpp

   1 //===- MBlazeSubtarget.cpp - MBlaze Subtarget Information -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the MBlaze specific subclass of TargetSubtargetInfo.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "MBlazeSubtarget.h"
  15 #include "MBlaze.h"
  16 #include "MBlazeRegisterInfo.h"
  17 #include "llvm/Support/CommandLine.h"
  18 #include "llvm/Target/TargetRegistry.h"
  19
  20 #define GET_SUBTARGETINFO_ENUM
  21 #define GET_SUBTARGETINFO_MC_DESC
  22 #define GET_SUBTARGETINFO_TARGET_DESC
  23 #define GET_SUBTARGETINFO_CTOR
  24 #include "MBlazeGenSubtargetInfo.inc"
  25
  26 using namespace llvm;
  27
  28 MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
  29                                  const std::string &CPU,
  30                                  const std::string &FS):
  31   MBlazeGenSubtargetInfo(TT, CPU, FS),
  32   HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
  33   HasFPU(false), HasMul64(false), HasSqrt(false)
  34 {
  35   // Parse features string.
  36   std::string CPUName = CPU;
  37   if (CPUName.empty())
  38     CPUName = "mblaze";
  39   ParseSubtargetFeatures(CPUName, FS);
  40
  41   // Only use instruction scheduling if the selected CPU has an instruction
  42   // itinerary (the default CPU is the only one that doesn't).
  43   HasItin = CPUName != "mblaze";
  44   DEBUG(dbgs() << "CPU " << CPUName << "(" << HasItin << ")\n");
  45
  46   // Initialize scheduling itinerary for the specified CPU.
  47   InstrItins = getInstrItineraryForCPU(CPUName);
  48
  49   // Compute the issue width of the MBlaze itineraries
  50   computeIssueWidth();
  51 }
  52
  53 void MBlazeSubtarget::computeIssueWidth() {
  54   InstrItins.IssueWidth = 1;
  55 }
  56
  57 bool MBlazeSubtarget::
  58 enablePostRAScheduler(CodeGenOpt::Level OptLevel,
  59                       TargetSubtargetInfo::AntiDepBreakMode& Mode,
  60                       RegClassVector& CriticalPathRCs) const {
  61   Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
  62   CriticalPathRCs.clear();
  63   CriticalPathRCs.push_back(&MBlaze::GPRRegClass);
  64   return HasItin && OptLevel >= CodeGenOpt::Default;
  65 }
  66
  67 MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
  68                                             StringRef FS) {
  69   MCSubtargetInfo *X = new MCSubtargetInfo();
  70   InitMBlazeMCSubtargetInfo(X, CPU, FS);
  71   return X;
  72 }
  73
  74 extern "C" void LLVMInitializeMBlazeMCSubtargetInfo() {
  75   TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
  76                                           createMBlazeMCSubtargetInfo);
  77 }