1 //===-- ARMMCTargetDesc.cpp - ARM Target Descriptions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides ARM specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "ARMMCTargetDesc.h"
15 #include "llvm/MC/MCInstrInfo.h"
16 #include "llvm/MC/MCRegisterInfo.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
18 #include "llvm/Target/TargetRegistry.h"
20 #define GET_REGINFO_MC_DESC
21 #include "ARMGenRegisterInfo.inc"
23 #define GET_INSTRINFO_MC_DESC
24 #include "ARMGenInstrInfo.inc"
26 #define GET_SUBTARGETINFO_ENUM
27 #define GET_SUBTARGETINFO_MC_DESC
28 #include "ARMGenSubtargetInfo.inc"
32 std::string
ARM_MC::ParseARMTriple(StringRef TT
) {
33 // Set the boolean corresponding to the current target triple, or the default
34 // if one cannot be determined, to true.
35 unsigned Len
= TT
.size();
38 // FIXME: Enahnce Triple helper class to extract ARM version.
40 if (Len
>= 5 && TT
.substr(0, 4) == "armv")
42 else if (Len
>= 6 && TT
.substr(0, 5) == "thumb") {
44 if (Len
>= 7 && TT
[5] == 'v')
48 std::string ARMArchFeature
;
50 unsigned SubVer
= TT
[Idx
];
51 if (SubVer
>= '7' && SubVer
<= '9') {
52 if (Len
>= Idx
+2 && TT
[Idx
+1] == 'm') {
53 // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv
54 ARMArchFeature
= "+v7,+noarm,+db,+hwdiv";
55 } else if (Len
>= Idx
+3 && TT
[Idx
+1] == 'e'&& TT
[Idx
+2] == 'm') {
56 // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
58 ARMArchFeature
= "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk";
60 // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2
61 ARMArchFeature
= "+v7,+neon,+db,+t2dsp";
62 } else if (SubVer
== '6') {
63 if (Len
>= Idx
+3 && TT
[Idx
+1] == 't' && TT
[Idx
+2] == '2')
64 ARMArchFeature
= "+v6t2";
66 ARMArchFeature
= "+v6";
67 } else if (SubVer
== '5') {
68 if (Len
>= Idx
+3 && TT
[Idx
+1] == 't' && TT
[Idx
+2] == 'e')
69 ARMArchFeature
= "+v5te";
71 ARMArchFeature
= "+v5t";
72 } else if (SubVer
== '4' && Len
>= Idx
+2 && TT
[Idx
+1] == 't')
73 ARMArchFeature
= "+v4t";
77 if (ARMArchFeature
.empty())
78 ARMArchFeature
= "+thumb-mode";
80 ARMArchFeature
+= ",+thumb-mode";
83 return ARMArchFeature
;
86 MCSubtargetInfo
*ARM_MC::createARMMCSubtargetInfo(StringRef TT
, StringRef CPU
,
88 std::string ArchFS
= ARM_MC::ParseARMTriple(TT
);
91 ArchFS
= ArchFS
+ "," + FS
.str();
96 MCSubtargetInfo
*X
= new MCSubtargetInfo();
97 InitARMMCSubtargetInfo(X
, CPU
, ArchFS
);
101 MCInstrInfo
*createARMMCInstrInfo() {
102 MCInstrInfo
*X
= new MCInstrInfo();
103 InitARMMCInstrInfo(X
);
107 MCRegisterInfo
*createARMMCRegisterInfo() {
108 MCRegisterInfo
*X
= new MCRegisterInfo();
109 InitARMMCRegisterInfo(X
);
113 // Force static initialization.
114 extern "C" void LLVMInitializeARMMCInstrInfo() {
115 TargetRegistry::RegisterMCInstrInfo(TheARMTarget
, createARMMCInstrInfo
);
116 TargetRegistry::RegisterMCInstrInfo(TheThumbTarget
, createARMMCInstrInfo
);
119 extern "C" void LLVMInitializeARMMCRegInfo() {
120 TargetRegistry::RegisterMCRegInfo(TheARMTarget
, createARMMCRegisterInfo
);
121 TargetRegistry::RegisterMCRegInfo(TheThumbTarget
, createARMMCRegisterInfo
);
124 extern "C" void LLVMInitializeARMMCSubtargetInfo() {
125 TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget
,
126 ARM_MC::createARMMCSubtargetInfo
);
127 TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget
,
128 ARM_MC::createARMMCSubtargetInfo
);