1 set(LLVM_TARGET_DEFINITIONS Alpha.td)
3 tablegen(AlphaGenRegisterInfo.h.inc -gen-register-desc-header)
4 tablegen(AlphaGenRegisterNames.inc -gen-register-enums)
5 tablegen(AlphaGenRegisterInfo.inc -gen-register-desc)
6 tablegen(AlphaGenInstrNames.inc -gen-instr-enums)
7 tablegen(AlphaGenInstrInfo.inc -gen-instr-desc)
8 tablegen(AlphaGenCodeEmitter.inc -gen-emitter)
9 tablegen(AlphaGenAsmWriter.inc -gen-asm-writer)
10 tablegen(AlphaGenDAGISel.inc -gen-dag-isel)
11 tablegen(AlphaGenCallingConv.inc -gen-callingconv)
12 tablegen(AlphaGenSubtarget.inc -gen-subtarget)
14 add_llvm_target(AlphaCodeGen
15 AlphaBranchSelector.cpp
25 AlphaTargetMachine.cpp
26 AlphaSelectionDAGInfo.cpp