Fixed some bugs in register stack pass.
[llvm/zpu.git] / test / CodeGen / CellSPU / bss.ll
blob327800d09cbfdd47a512a4f49e15554e1e11a5ab
1 ; RUN: llc < %s -march=cellspu | FileCheck %s
3 @bssVar = global i32 zeroinitializer
4 ; CHECK: .section .bss
5 ; CHECK-NEXT: .globl
7 @localVar= internal global i32 zeroinitializer
8 ; CHECK-NOT: .lcomm
9 ; CHECK: .local
10 ; CHECK-NEXT: .comm