Fixed some bugs in register stack pass.
[llvm/zpu.git] / test / CodeGen / SystemZ / 2009-06-02-And32Imm.ll
blob3cfa97dfc2ba70cbfc720b87dcaef0a902158967
1 ; RUN: llc < %s -march=systemz | grep nilf | count 1
2 ; RUN: llc < %s -march=systemz | grep nill | count 1
4 define i32 @gnu_dev_major(i64 %__dev) nounwind readnone {
5 entry:
6         %shr = lshr i64 %__dev, 8               ; <i64> [#uses=1]
7         %shr8 = trunc i64 %shr to i32           ; <i32> [#uses=1]
8         %shr2 = lshr i64 %__dev, 32             ; <i64> [#uses=1]
9         %conv = trunc i64 %shr2 to i32          ; <i32> [#uses=1]
10         %and3 = and i32 %conv, -4096            ; <i32> [#uses=1]
11         %and6 = and i32 %shr8, 4095             ; <i32> [#uses=1]
12         %conv5 = or i32 %and6, %and3            ; <i32> [#uses=1]
13         ret i32 %conv5