Fixed some bugs in register stack pass.

[llvm/zpu.git] / test / CodeGen / X86 / 2007-02-23-DAGCombine-Miscompile.ll

; PR1219
; RUN: llc < %s -march=x86 | grep {movl \$1, %eax}

define i32 @test(i1 %X) {
old_entry1:
        %hvar2 = zext i1 %X to i32
        %C = icmp sgt i32 %hvar2, -1
        br i1 %C, label %cond_true15, label %cond_true
cond_true15:
        ret i32 1
cond_true:
        ret i32 2
}