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Fixed some bugs in register stack pass.
[llvm/zpu.git]
/
test
/
CodeGen
/
X86
/
2009-06-05-ScalarToVectorByteMMX.ll
blob
01852a6eca1fd0d93d4ee2c08ed32f9c628a46c8
1
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl
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define <8 x i8> @a(i8 zeroext %x) nounwind {
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%r = insertelement <8 x i8> undef, i8 %x, i32 0
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ret <8 x i8> %r
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}
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