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Fixed some bugs in register stack pass.
[llvm/zpu.git]
/
test
/
CodeGen
/
X86
/
promote-i16.ll
blob
101bb29593cc8f889192a2ece9d01457a6f68787
1
; RUN: llc < %s -march=x86 | FileCheck %s
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define signext i16 @foo(i16 signext %x) nounwind {
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entry:
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; CHECK: foo:
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; CHECK: movzwl 4(%esp), %eax
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; CHECK: xorl $21998, %eax
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; CHECK: movswl %ax, %eax
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%0 = xor i16 %x, 21998
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ret i16 %0
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}