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Fixed some bugs in register stack pass.
[llvm/zpu.git]
/
test
/
CodeGen
/
X86
/
select-aggregate.ll
blob
44cafe22af14491d96bf15f875be09aa5be36ce5
1
; RUN: llc < %s -march=x86-64 | FileCheck %s
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; PR5757
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; CHECK: cmovneq %rdi, %rsi
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; CHECK: movl (%rsi), %eax
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%0 = type { i64, i32 }
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define i32 @foo(%0* %p, %0* %q, i1 %r) nounwind {
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%t0 = load %0* %p
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%t1 = load %0* %q
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%t4 = select i1 %r, %0 %t0, %0 %t1
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%t5 = extractvalue %0 %t4, 1
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ret i32 %t5
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}