Fixed some bugs in register stack pass.
[llvm/zpu.git] / test / CodeGen / X86 / shift-combine.ll
blobe443ac19a80f630b15f656a239d4750996f636b2
1 ; RUN: llc < %s | not grep shrl
3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
4 target triple = "i686-apple-darwin8"
5 @array = weak global [4 x i32] zeroinitializer          ; <[4 x i32]*> [#uses=1]
7 define i32 @foo(i32 %x) {
8 entry:
9         %tmp2 = lshr i32 %x, 2          ; <i32> [#uses=1]
10         %tmp3 = and i32 %tmp2, 3                ; <i32> [#uses=1]
11         %tmp4 = getelementptr [4 x i32]* @array, i32 0, i32 %tmp3               ; <i32*> [#uses=1]
12         %tmp5 = load i32* %tmp4, align 4                ; <i32> [#uses=1]
13         ret i32 %tmp5