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Fixed some bugs in register stack pass.
[llvm/zpu.git]
/
test
/
CodeGen
/
X86
/
shrink-fp-const2.ll
blob
3d5203be09a0951eaccdc1869d6580bd6dd00809
1
; RUN: llc < %s -march=x86 | grep flds
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; This should be a flds, not fldt.
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define x86_fp80 @test2() nounwind {
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entry:
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ret x86_fp80 0xK3FFFC000000000000000
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}
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